Loading drivers/pwm/pwm-qpnp.c +28 −18 Original line number Diff line number Diff line Loading @@ -317,6 +317,7 @@ struct _qpnp_pwm_config { struct pwm_period_config period; int supported_sizes; int force_pwm_size; bool update_period; }; /* Public facing structure */ Loading Loading @@ -1211,28 +1212,32 @@ static int _pwm_config(struct qpnp_pwm_chip *chip, rc = qpnp_lpg_save_pwm_value(chip); if (rc) goto out; if (pwm_config->update_period) { rc = qpnp_lpg_configure_pwm(chip); if (rc) goto out; rc = qpnp_configure_pwm_control(chip); if (rc) goto out; if (!rc && chip->enabled) { rc = qpnp_lpg_configure_pwm_state(chip, QPNP_PWM_ENABLE); rc = qpnp_lpg_configure_pwm_state(chip, QPNP_PWM_ENABLE); if (rc) { pr_err("Error in configuring pwm state, rc=%d\n", rc); pr_err("Error in configuring pwm state, rc=%d\n", rc); return rc; } /* Enable the glitch removal after PWM is enabled */ rc = qpnp_lpg_glitch_removal(chip, true); if (rc) { pr_err("Error in enabling glitch control, rc=%d\n", rc); pr_err("Error in enabling glitch control, rc=%d\n", rc); return rc; } } } pr_debug("duty/period=%u/%u %s: pwm_value=%d (of %d)\n", (unsigned int)duty_value, (unsigned int)period_value, (tm_lvl == LVL_USEC) ? "usec" : "nsec", Loading Loading @@ -1375,12 +1380,14 @@ static int qpnp_pwm_config(struct pwm_chip *pwm_chip, spin_lock_irqsave(&chip->lpg_lock, flags); chip->pwm_config.update_period = false; if (prev_period_us > INT_MAX / NSEC_PER_USEC || prev_period_us * NSEC_PER_USEC != period_ns) { qpnp_lpg_calc_period(LVL_NSEC, period_ns, chip); qpnp_lpg_save_period(chip); pwm->period = period_ns; chip->pwm_config.pwm_period = period_ns / NSEC_PER_USEC; chip->pwm_config.update_period = true; } rc = _pwm_config(chip, LVL_NSEC, duty_ns, period_ns); Loading Loading @@ -1619,6 +1626,7 @@ int pwm_config_us(struct pwm_device *pwm, int duty_us, int period_us) spin_lock_irqsave(&chip->lpg_lock, flags); chip->pwm_config.update_period = false; if (chip->pwm_config.pwm_period != period_us) { qpnp_lpg_calc_period(LVL_USEC, period_us, chip); qpnp_lpg_save_period(chip); Loading @@ -1628,6 +1636,7 @@ int pwm_config_us(struct pwm_device *pwm, int duty_us, int period_us) pwm->period = 0; else pwm->period = (unsigned int)period_us * NSEC_PER_USEC; chip->pwm_config.update_period = true; } rc = _pwm_config(chip, LVL_USEC, duty_us, period_us); Loading Loading @@ -1734,6 +1743,7 @@ static int qpnp_parse_pwm_dt_config(struct device_node *of_pwm_node, qpnp_lpg_calc_period(LVL_USEC, period, chip); qpnp_lpg_save_period(chip); chip->pwm_config.pwm_period = period; chip->pwm_config.update_period = true; rc = _pwm_config(chip, LVL_USEC, chip->pwm_config.pwm_duty, period); Loading Loading
drivers/pwm/pwm-qpnp.c +28 −18 Original line number Diff line number Diff line Loading @@ -317,6 +317,7 @@ struct _qpnp_pwm_config { struct pwm_period_config period; int supported_sizes; int force_pwm_size; bool update_period; }; /* Public facing structure */ Loading Loading @@ -1211,28 +1212,32 @@ static int _pwm_config(struct qpnp_pwm_chip *chip, rc = qpnp_lpg_save_pwm_value(chip); if (rc) goto out; if (pwm_config->update_period) { rc = qpnp_lpg_configure_pwm(chip); if (rc) goto out; rc = qpnp_configure_pwm_control(chip); if (rc) goto out; if (!rc && chip->enabled) { rc = qpnp_lpg_configure_pwm_state(chip, QPNP_PWM_ENABLE); rc = qpnp_lpg_configure_pwm_state(chip, QPNP_PWM_ENABLE); if (rc) { pr_err("Error in configuring pwm state, rc=%d\n", rc); pr_err("Error in configuring pwm state, rc=%d\n", rc); return rc; } /* Enable the glitch removal after PWM is enabled */ rc = qpnp_lpg_glitch_removal(chip, true); if (rc) { pr_err("Error in enabling glitch control, rc=%d\n", rc); pr_err("Error in enabling glitch control, rc=%d\n", rc); return rc; } } } pr_debug("duty/period=%u/%u %s: pwm_value=%d (of %d)\n", (unsigned int)duty_value, (unsigned int)period_value, (tm_lvl == LVL_USEC) ? "usec" : "nsec", Loading Loading @@ -1375,12 +1380,14 @@ static int qpnp_pwm_config(struct pwm_chip *pwm_chip, spin_lock_irqsave(&chip->lpg_lock, flags); chip->pwm_config.update_period = false; if (prev_period_us > INT_MAX / NSEC_PER_USEC || prev_period_us * NSEC_PER_USEC != period_ns) { qpnp_lpg_calc_period(LVL_NSEC, period_ns, chip); qpnp_lpg_save_period(chip); pwm->period = period_ns; chip->pwm_config.pwm_period = period_ns / NSEC_PER_USEC; chip->pwm_config.update_period = true; } rc = _pwm_config(chip, LVL_NSEC, duty_ns, period_ns); Loading Loading @@ -1619,6 +1626,7 @@ int pwm_config_us(struct pwm_device *pwm, int duty_us, int period_us) spin_lock_irqsave(&chip->lpg_lock, flags); chip->pwm_config.update_period = false; if (chip->pwm_config.pwm_period != period_us) { qpnp_lpg_calc_period(LVL_USEC, period_us, chip); qpnp_lpg_save_period(chip); Loading @@ -1628,6 +1636,7 @@ int pwm_config_us(struct pwm_device *pwm, int duty_us, int period_us) pwm->period = 0; else pwm->period = (unsigned int)period_us * NSEC_PER_USEC; chip->pwm_config.update_period = true; } rc = _pwm_config(chip, LVL_USEC, duty_us, period_us); Loading Loading @@ -1734,6 +1743,7 @@ static int qpnp_parse_pwm_dt_config(struct device_node *of_pwm_node, qpnp_lpg_calc_period(LVL_USEC, period, chip); qpnp_lpg_save_period(chip); chip->pwm_config.pwm_period = period; chip->pwm_config.update_period = true; rc = _pwm_config(chip, LVL_USEC, chip->pwm_config.pwm_duty, period); Loading