Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit c8d3578f authored by Fenglin Wu's avatar Fenglin Wu
Browse files

pwm: pwm-qpnp: Ignore changing period setting if it's not requested



It's not necessary to reprogram PWM period setting if only
changing PWM duty cycle.

Change-Id: I366e17a5e2f18c09ab0850d00ec08a35e0f1cb9f
Signed-off-by: default avatarFenglin Wu <fenglinw@codeaurora.org>
parent a25d7287
Loading
Loading
Loading
Loading
+28 −18
Original line number Original line Diff line number Diff line
@@ -317,6 +317,7 @@ struct _qpnp_pwm_config {
	struct pwm_period_config	period;
	struct pwm_period_config	period;
	int				supported_sizes;
	int				supported_sizes;
	int				force_pwm_size;
	int				force_pwm_size;
	bool				update_period;
};
};


/* Public facing structure */
/* Public facing structure */
@@ -1211,28 +1212,32 @@ static int _pwm_config(struct qpnp_pwm_chip *chip,
	rc = qpnp_lpg_save_pwm_value(chip);
	rc = qpnp_lpg_save_pwm_value(chip);
	if (rc)
	if (rc)
		goto out;
		goto out;

	if (pwm_config->update_period) {
		rc = qpnp_lpg_configure_pwm(chip);
		rc = qpnp_lpg_configure_pwm(chip);
		if (rc)
		if (rc)
			goto out;
			goto out;
		rc = qpnp_configure_pwm_control(chip);
		rc = qpnp_configure_pwm_control(chip);
		if (rc)
		if (rc)
			goto out;
			goto out;

		if (!rc && chip->enabled) {
		if (!rc && chip->enabled) {
		rc = qpnp_lpg_configure_pwm_state(chip, QPNP_PWM_ENABLE);
			rc = qpnp_lpg_configure_pwm_state(chip,
					QPNP_PWM_ENABLE);
			if (rc) {
			if (rc) {
			pr_err("Error in configuring pwm state, rc=%d\n", rc);
				pr_err("Error in configuring pwm state, rc=%d\n",
						rc);
				return rc;
				return rc;
			}
			}


			/* Enable the glitch removal after PWM is enabled */
			/* Enable the glitch removal after PWM is enabled */
			rc = qpnp_lpg_glitch_removal(chip, true);
			rc = qpnp_lpg_glitch_removal(chip, true);
			if (rc) {
			if (rc) {
			pr_err("Error in enabling glitch control, rc=%d\n", rc);
				pr_err("Error in enabling glitch control, rc=%d\n",
						rc);
				return rc;
				return rc;
			}
			}
		}
		}

	}
	pr_debug("duty/period=%u/%u %s: pwm_value=%d (of %d)\n",
	pr_debug("duty/period=%u/%u %s: pwm_value=%d (of %d)\n",
		 (unsigned int)duty_value, (unsigned int)period_value,
		 (unsigned int)duty_value, (unsigned int)period_value,
		 (tm_lvl == LVL_USEC) ? "usec" : "nsec",
		 (tm_lvl == LVL_USEC) ? "usec" : "nsec",
@@ -1375,12 +1380,14 @@ static int qpnp_pwm_config(struct pwm_chip *pwm_chip,


	spin_lock_irqsave(&chip->lpg_lock, flags);
	spin_lock_irqsave(&chip->lpg_lock, flags);


	chip->pwm_config.update_period = false;
	if (prev_period_us > INT_MAX / NSEC_PER_USEC ||
	if (prev_period_us > INT_MAX / NSEC_PER_USEC ||
			prev_period_us * NSEC_PER_USEC != period_ns) {
			prev_period_us * NSEC_PER_USEC != period_ns) {
		qpnp_lpg_calc_period(LVL_NSEC, period_ns, chip);
		qpnp_lpg_calc_period(LVL_NSEC, period_ns, chip);
		qpnp_lpg_save_period(chip);
		qpnp_lpg_save_period(chip);
		pwm->period = period_ns;
		pwm->period = period_ns;
		chip->pwm_config.pwm_period = period_ns / NSEC_PER_USEC;
		chip->pwm_config.pwm_period = period_ns / NSEC_PER_USEC;
		chip->pwm_config.update_period = true;
	}
	}


	rc = _pwm_config(chip, LVL_NSEC, duty_ns, period_ns);
	rc = _pwm_config(chip, LVL_NSEC, duty_ns, period_ns);
@@ -1619,6 +1626,7 @@ int pwm_config_us(struct pwm_device *pwm, int duty_us, int period_us)


	spin_lock_irqsave(&chip->lpg_lock, flags);
	spin_lock_irqsave(&chip->lpg_lock, flags);


	chip->pwm_config.update_period = false;
	if (chip->pwm_config.pwm_period != period_us) {
	if (chip->pwm_config.pwm_period != period_us) {
		qpnp_lpg_calc_period(LVL_USEC, period_us, chip);
		qpnp_lpg_calc_period(LVL_USEC, period_us, chip);
		qpnp_lpg_save_period(chip);
		qpnp_lpg_save_period(chip);
@@ -1628,6 +1636,7 @@ int pwm_config_us(struct pwm_device *pwm, int duty_us, int period_us)
			pwm->period = 0;
			pwm->period = 0;
		else
		else
			pwm->period = (unsigned int)period_us * NSEC_PER_USEC;
			pwm->period = (unsigned int)period_us * NSEC_PER_USEC;
		chip->pwm_config.update_period = true;
	}
	}


	rc = _pwm_config(chip, LVL_USEC, duty_us, period_us);
	rc = _pwm_config(chip, LVL_USEC, duty_us, period_us);
@@ -1734,6 +1743,7 @@ static int qpnp_parse_pwm_dt_config(struct device_node *of_pwm_node,
	qpnp_lpg_calc_period(LVL_USEC, period, chip);
	qpnp_lpg_calc_period(LVL_USEC, period, chip);
	qpnp_lpg_save_period(chip);
	qpnp_lpg_save_period(chip);
	chip->pwm_config.pwm_period = period;
	chip->pwm_config.pwm_period = period;
	chip->pwm_config.update_period = true;


	rc = _pwm_config(chip, LVL_USEC, chip->pwm_config.pwm_duty, period);
	rc = _pwm_config(chip, LVL_USEC, chip->pwm_config.pwm_duty, period);