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Commit f619b3d8 authored by Borislav Petkov's avatar Borislav Petkov Committed by H. Peter Anvin
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x86, cacheinfo: Remove NUMA dependency, fix for AMD Fam10h rev D1 



The show/store_cache_disable routines depend unnecessarily on NUMA's
cpu_to_node and the disabling of cache indices broke when !CONFIG_NUMA.
Remove that dependency by using a helper which is always correct.

While at it, enable L3 Cache Index disable on rev D1 Istanbuls which
sport the feature too.

Signed-off-by: default avatarBorislav Petkov <borislav.petkov@amd.com>
LKML-Reference: <20100218184339.GG20473@aftab>
Signed-off-by: default avatarH. Peter Anvin <hpa@zytor.com>
parent 414bb144

arch/x86/kernel/cpu/intel_cacheinfo.c

+3 −3
Original line number Diff line number Diff line
@@ -327,7 +327,7 @@ amd_check_l3_disable(int index, struct _cpuid4_info_regs *this_leaf) 


	/* see errata #382 and #388 */

	if ((boot_cpu_data.x86 == 0x10) &&

	    ((boot_cpu_data.x86_model < 0x9) ||

	    ((boot_cpu_data.x86_model < 0x8) ||

	     (boot_cpu_data.x86_mask  < 0x1)))

		return;
@@ -744,7 +744,7 @@ static ssize_t show_cache_disable(struct _cpuid4_info *this_leaf, char *buf, 
				  unsigned int index)

{

	int cpu = cpumask_first(to_cpumask(this_leaf->shared_cpu_map));

	int node = cpu_to_node(cpu);

	int node = amd_get_nb_id(cpu);

	struct pci_dev *dev = node_to_k8_nb_misc(node);

	unsigned int reg = 0;
@@ -771,7 +771,7 @@ static ssize_t store_cache_disable(struct _cpuid4_info *this_leaf, 
	const char *buf, size_t count, unsigned int index)

{

	int cpu = cpumask_first(to_cpumask(this_leaf->shared_cpu_map));

	int node = cpu_to_node(cpu);

	int node = amd_get_nb_id(cpu);

	struct pci_dev *dev = node_to_k8_nb_misc(node);

	unsigned long val = 0;