Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 414bb144 authored by Joerg Roedel's avatar Joerg Roedel Committed by H. Peter Anvin
Browse files

x86, cpu: Print AMD virtualization features in /proc/cpuinfo



This patch adds code to cpu initialization path to detect
the extended virtualization features of AMD cpus to show
them in /proc/cpuinfo.

Signed-off-by: default avatarJoerg Roedel <joerg.roedel@amd.com>
LKML-Reference: <1260792521-15212-1-git-send-email-joerg.roedel@amd.com>
Signed-off-by: default avatarH. Peter Anvin <hpa@zytor.com>
parent 048a8774
Loading
Loading
Loading
Loading
+4 −0
Original line number Diff line number Diff line
@@ -168,6 +168,10 @@
#define X86_FEATURE_FLEXPRIORITY (8*32+ 2) /* Intel FlexPriority */
#define X86_FEATURE_EPT         (8*32+ 3) /* Intel Extended Page Table */
#define X86_FEATURE_VPID        (8*32+ 4) /* Intel Virtual Processor ID */
#define X86_FEATURE_NPT		(8*32+5)  /* AMD Nested Page Table support */
#define X86_FEATURE_LBRV	(8*32+6)  /* AMD LBR Virtualization support */
#define X86_FEATURE_SVML	(8*32+7)  /* "svm_lock" AMD SVM locking MSR */
#define X86_FEATURE_NRIPS	(8*32+8)  /* "nrip_save" AMD SVM next_rip save */

#if defined(__KERNEL__) && !defined(__ASSEMBLY__)

+4 −0
Original line number Diff line number Diff line
@@ -32,6 +32,10 @@ void __cpuinit init_scattered_cpuid_features(struct cpuinfo_x86 *c)
	static const struct cpuid_bit __cpuinitconst cpuid_bits[] = {
		{ X86_FEATURE_IDA, CR_EAX, 1, 0x00000006 },
		{ X86_FEATURE_ARAT, CR_EAX, 2, 0x00000006 },
		{ X86_FEATURE_NPT,   CR_EDX, 0, 0x8000000a },
		{ X86_FEATURE_LBRV,  CR_EDX, 1, 0x8000000a },
		{ X86_FEATURE_SVML,  CR_EDX, 2, 0x8000000a },
		{ X86_FEATURE_NRIPS, CR_EDX, 3, 0x8000000a },
		{ 0, 0, 0, 0 }
	};