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Commit e93ea06a authored by Eugeni Dodonov's avatar Eugeni Dodonov Committed by Daniel Vetter
Browse files

drm/i915: add S PLL control 



This PLL control can drive DDI ports at desired frequencies for
DisplayPort and FDI connections.

Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: default avatarEugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 52f025ef

drivers/gpu/drm/i915/i915_reg.h

+8 −0
Original line number Diff line number Diff line
@@ -4134,4 +4134,12 @@ 
#define  PIXCLK_GATE_UNGATE		1<<0

#define  PIXCLK_GATE_GATE		0<<0



/* SPLL */

#define SPLL_CTL				0x46020

#define  SPLL_PLL_ENABLE		(1<<31)

#define  SPLL_PLL_SCC			(1<<28)

#define  SPLL_PLL_NON_SCC		(2<<28)

#define  SPLL_PLL_FREQ_810MHz	(0<<26)

#define  SPLL_PLL_FREQ_1350MHz	(1<<26)



#endif /* _I915_REG_H_ */