Commit 52f025ef authored Mar 29, 2012 by Eugeni Dodonov Committed by Daniel Vetter Apr 09, 2012

drm/i915: add PIXCLK_GATE register



Pixel clock gating control for Lynx point.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

parent 7501a4d8

drivers/gpu/drm/i915/i915_reg.h

+6 −0

Original line number	Diff line number	Diff line
		@@ -4128,4 +4128,10 @@
		#define SBI_RESPONSE_SUCCESS (0x0<<1)
		#define SBI_BUSY (0x1<<0)
		#define SBI_READY (0x0<<0)

		/* LPT PIXCLK_GATE */
		#define PIXCLK_GATE 0xC6020
		#define PIXCLK_GATE_UNGATE 1<<0
		#define PIXCLK_GATE_GATE 0<<0

		#endif /* _I915_REG_H_ */