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Commit e00eea42 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
* 'for-linus' of git://www.atmel.no/~hskinnemoen/linux/kernel/avr32:
  [AVR32] Define ARCH_KMALLOC_MINALIGN to L1_CACHE_BYTES
  [AVR32] STK1000: Set SPI_MODE_3 in the ltv350qv board info
  [AVR32] gpio_*_cansleep() fix
  [AVR32] ratelimit segfault reporting rate
parents bc90ba09 093d0faf
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+1 −0
Original line number Diff line number Diff line
@@ -42,6 +42,7 @@ static struct spi_board_info spi0_board_info[] __initdata = {
		.modalias	= "ltv350qv",
		.max_speed_hz	= 16000000,
		.chip_select	= 1,
		.mode		= SPI_MODE_3,
	},
};

+1 −1
Original line number Diff line number Diff line
@@ -158,7 +158,7 @@ bad_area:
	up_read(&mm->mmap_sem);

	if (user_mode(regs)) {
		if (exception_trace)
		if (exception_trace && printk_ratelimit())
			printk("%s%s[%d]: segfault at %08lx pc %08lx "
			       "sp %08lx ecr %lu\n",
			       is_init(tsk) ? KERN_EMERG : KERN_INFO,
+2 −0
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@@ -14,6 +14,8 @@ int gpio_direction_output(unsigned int gpio, int value);
int gpio_get_value(unsigned int gpio);
void gpio_set_value(unsigned int gpio, int value);

#include <asm-generic/gpio.h>		/* cansleep wrappers */

static inline int gpio_to_irq(unsigned int gpio)
{
	return gpio + GPIO_IRQ_BASE;
+9 −0
Original line number Diff line number Diff line
@@ -4,6 +4,15 @@
#define L1_CACHE_SHIFT 5
#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)

/*
 * Memory returned by kmalloc() may be used for DMA, so we must make
 * sure that all such allocations are cache aligned. Otherwise,
 * unrelated code may cause parts of the buffer to be read into the
 * cache before the transfer is done, causing old data to be seen by
 * the CPU.
 */
#define ARCH_KMALLOC_MINALIGN	L1_CACHE_BYTES

#ifndef __ASSEMBLER__
struct cache_info {
	unsigned int ways;