Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 093d0faf authored by Haavard Skinnemoen's avatar Haavard Skinnemoen
Browse files

[AVR32] Define ARCH_KMALLOC_MINALIGN to L1_CACHE_BYTES 



This allows SLUB debugging to be used without fear of messing up DMA
transfers. SPI is one example that easily breaks without this patch.

Signed-off-by: default avatarHaavard Skinnemoen <hskinnemoen@atmel.com>
parent 2fdfe8d9

include/asm-avr32/cache.h

+9 −0
Original line number Diff line number Diff line
@@ -4,6 +4,15 @@ 
#define L1_CACHE_SHIFT 5

#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)



/*

 * Memory returned by kmalloc() may be used for DMA, so we must make

 * sure that all such allocations are cache aligned. Otherwise,

 * unrelated code may cause parts of the buffer to be read into the

 * cache before the transfer is done, causing old data to be seen by

 * the CPU.

 */

#define ARCH_KMALLOC_MINALIGN	L1_CACHE_BYTES



#ifndef __ASSEMBLER__

struct cache_info {

	unsigned int ways;