ARM: dts: msm: Update QoS priority for pimem bus master for sdm660

pimem bus master is starving for data from ddr and time out is
observed with QoS priority set to 0, so increase the QoS priority
for pimem bus master to 1.

Change-Id: Ie90d0a41953e03d8cba9843fd8fb4f7dc511a62d
Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>