Commit ca3d241c authored Nov 09, 2012 by Joseph Lo Committed by Stephen Warren Nov 09, 2012

ARM: tegra: enable data prefetch on L2



Enable the data prefetch on L2. The bit28 in aux ctrl register.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>

parent ffa05e45

arch/arm/mach-tegra/common.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -121,7 +121,7 @@ static void __init tegra_init_cache(void)

		cache_type = readl(p + L2X0_CACHE_TYPE);
		aux_ctrl = (cache_type & 0x700) << (17-8);
		aux_ctrl \|= 0x6C000001;
		aux_ctrl \|= 0x7C000001;

		l2x0_of_init(aux_ctrl, 0x8200c3fe);
		#endif