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Commit c50041fa authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "msm: camera: isp: Fix overflow recovery"

parents c90a1288 4e3c6202

arch/arm/boot/dts/qcom/msmcobalt-camera.dtsi

+14 −15
Original line number Diff line number Diff line
@@ -333,7 +333,7 @@ 
		camss-vdd-supply = <&gdsc_camss_top>;

		vdd-supply = <&gdsc_cpp>;

		qcom,vdd-names = "smmu-vdd", "camss-vdd", "vdd";

		clocks = <&clock_mmss clk_mmss_mnoc_maxi_clk>,

		clocks = <&clock_gcc clk_mmssnoc_axi_clk>,

			<&clock_mmss clk_mmss_mnoc_ahb_clk>,

			<&clock_mmss clk_mmss_bimc_smmu_ahb_clk>,

			<&clock_mmss clk_mmss_bimc_smmu_axi_clk>,
@@ -344,7 +344,7 @@ 
			<&clock_mmss clk_mmss_fd_ahb_clk>,

			<&clock_mmss clk_mmss_camss_cpp_axi_clk>,

			<&clock_mmss clk_mmss_camss_cpp_vbif_ahb_clk>;

		clock-names = "mmss_mnoc_maxi_clk",

		clock-names = "mmssnoc_axi",

			"mmss_mnoc_ahb_clk",

			"mmss_bimc_smmu_ahb_clk",

			"mmss_bimc_smmu_axi_clk",
@@ -387,7 +387,6 @@ 
		vdd-supply = <&gdsc_cpp>;

		qcom,vdd-names = "smmu-vdd", "camss-vdd", "vdd";

		clocks = <&clock_gcc clk_mmssnoc_axi_clk>,

			<&clock_mmss clk_mmss_mnoc_maxi_clk>,

			<&clock_mmss clk_mmss_mnoc_ahb_clk>,

			<&clock_mmss clk_mmss_camss_ahb_clk>,

			<&clock_mmss clk_mmss_camss_top_ahb_clk>,
@@ -398,12 +397,12 @@ 
			<&clock_mmss clk_mmss_bimc_smmu_axi_clk>,

			<&clock_mmss clk_mmss_camss_cpp_vbif_ahb_clk>;

		clock-names = "mmssnoc_axi_clk",

			"mnoc_maxi_clk", "mnoc_ahb_clk",

			"mnoc_ahb_clk",

			"camss_ahb_clk", "camss_top_ahb_clk",

			"cpp_core_clk", "camss_cpp_ahb_clk",

			"camss_cpp_axi_clk", "micro_iface_clk",

			"mmss_smmu_axi_clk", "cpp_vbif_ahb_clk";

		qcom,clock-rates = <0 0 0 0 0 200000000 0 0 0 0 0>;

		qcom,clock-rates = <0 0 0 0 200000000 0 0 0 0 0>;

		qcom,min-clock-rate = <200000000>;

		qcom,bus-master = <1>;

		qcom,vbif-qos-setting = <0x20 0x10000000>,
@@ -455,7 +454,7 @@ 
		qcom,vdd-names = "camss-vdd", "vfe0-vdd",

				"vfe1-vdd";

		qcom,clock-cntl-support;

		clocks = <&clock_mmss clk_mmss_mnoc_maxi_clk>,

		clocks = <&clock_gcc clk_mmssnoc_axi_clk>,

			<&clock_mmss clk_mmss_mnoc_ahb_clk>,

			<&clock_mmss clk_mmss_camss_ahb_clk>,

			<&clock_mmss clk_mmss_camss_top_ahb_clk>,
@@ -482,7 +481,7 @@ 
			<&clock_mmss clk_mmss_camss_vfe1_clk>,

			<&clock_mmss clk_vfe1_clk_src>,

			<&clock_mmss clk_mmss_camss_csi_vfe1_clk>;

		clock-names = "mnoc_maxi_clk", "mnoc_ahb_clk",

		clock-names = "mmssnoc_axi", "mnoc_ahb_clk",

			"camss_ahb_clk",

			"camss_top_ahb_clk", "ispif_ahb_clk",

			"csi0_src_clk", "csi1_src_clk",
@@ -534,7 +533,7 @@ 
		camss-vdd-supply = <&gdsc_camss_top>;

		smmu-vdd-supply = <&gdsc_bimc_smmu>;

		qcom,vdd-names = "vdd", "camss-vdd", "smmu-vdd";

		clocks = <&clock_mmss clk_mmss_mnoc_maxi_clk>,

		clocks = <&clock_gcc clk_mmssnoc_axi_clk>,

			<&clock_mmss clk_mmss_mnoc_ahb_clk>,

			<&clock_mmss clk_mmss_bimc_smmu_ahb_clk>,

			<&clock_mmss clk_mmss_bimc_smmu_axi_clk>,
@@ -547,7 +546,7 @@ 
			<&clock_mmss clk_mmss_camss_vfe_vbif_axi_clk>,

			<&clock_mmss clk_vfe0_clk_src>,

			<&clock_mmss clk_mmss_camss_csi_vfe0_clk>;

		clock-names = "mnoc_maxi_clk", "mnoc_ahb_clk",

		clock-names = "mmssnoc_axi", "mnoc_ahb_clk",

			"bimc_smmu_ahb_clk", "bimc_smmu_axi_clk",

			"camss_ahb_clk", "camss_top_ahb_clk",

			"camss_vfe_clk", "camss_vfe_stream_clk",
@@ -614,7 +613,7 @@ 
		camss-vdd-supply = <&gdsc_camss_top>;

		smmu-vdd-supply = <&gdsc_bimc_smmu>;

		qcom,vdd-names = "vdd", "camss-vdd", "smmu-vdd";

		clocks = <&clock_mmss clk_mmss_mnoc_maxi_clk>,

		clocks = <&clock_gcc clk_mmssnoc_axi_clk>,

			<&clock_mmss clk_mmss_mnoc_ahb_clk>,

			<&clock_mmss clk_mmss_bimc_smmu_ahb_clk>,

			<&clock_mmss clk_mmss_bimc_smmu_axi_clk>,
@@ -627,7 +626,7 @@ 
			<&clock_mmss clk_mmss_camss_vfe_vbif_axi_clk>,

			<&clock_mmss clk_vfe1_clk_src>,

			<&clock_mmss clk_mmss_camss_csi_vfe1_clk>;

		clock-names = "mnoc_maxi_clk", "mnoc_ahb_clk",

		clock-names = "mmssnoc_axi", "mnoc_ahb_clk",

			"bimc_smmu_ahb_clk", "bimc_smmu_axi_clk",

			"camss_ahb_clk", "camss_top_ahb_clk",

			"camss_vfe_clk", "camss_vfe_stream_clk",
@@ -752,7 +751,7 @@ 
		smmu-vdd-supply = <&gdsc_bimc_smmu>;

		camss-vdd-supply = <&gdsc_camss_top>;

		qcom,vdd-names = "smmu-vdd", "camss-vdd";

		clock-names = "mmss_mnoc_maxi_clk",

		clock-names = "mmssnoc_axi",

			"mmss_mnoc_ahb_clk",

			"mmss_bimc_smmu_ahb_clk",

			"mmss_bimc_smmu_axi_clk",
@@ -761,7 +760,7 @@ 
			"core_clk",

			"mmss_camss_jpeg_ahb_clk",

			"mmss_camss_jpeg_axi_clk";

		clocks = <&clock_mmss clk_mmss_mnoc_maxi_clk>,

		clocks = <&clock_gcc clk_mmssnoc_axi_clk>,

			<&clock_mmss clk_mmss_mnoc_ahb_clk>,

			<&clock_mmss clk_mmss_bimc_smmu_ahb_clk>,

			<&clock_mmss clk_mmss_bimc_smmu_axi_clk>,
@@ -796,7 +795,7 @@ 
		smmu-vdd-supply = <&gdsc_bimc_smmu>;

		camss-vdd-supply = <&gdsc_camss_top>;

		qcom,vdd-names = "smmu-vdd", "camss-vdd";

		clock-names = "mmss_mnoc_maxi_clk",

		clock-names = "mmssnoc_axi",

			"mmss_mnoc_ahb_clk",

			"mmss_bimc_smmu_ahb_clk",

			"mmss_bimc_smmu_axi_clk",
@@ -805,7 +804,7 @@ 
			"core_clk",

			"mmss_camss_jpeg_ahb_clk",

			"mmss_camss_jpeg_axi_clk";

		clocks = <&clock_mmss clk_mmss_mnoc_maxi_clk>,

		clocks = <&clock_gcc clk_mmssnoc_axi_clk>,

			<&clock_mmss clk_mmss_mnoc_ahb_clk>,

			<&clock_mmss clk_mmss_bimc_smmu_ahb_clk>,

			<&clock_mmss clk_mmss_bimc_smmu_axi_clk>,

drivers/media/platform/msm/camera_v2/isp/msm_isp47.c

+91 −37
Original line number Diff line number Diff line
@@ -248,13 +248,31 @@ static enum cam_ahb_clk_vote msm_isp47_get_cam_clk_vote( 
	return 0;

}



static int msm_isp47_ahb_clk_cfg(struct vfe_device *vfe_dev,

int msm_isp47_ahb_clk_cfg(struct vfe_device *vfe_dev,

			struct msm_isp_ahb_clk_cfg *ahb_cfg)

{

	int rc = 0;

	enum cam_ahb_clk_vote vote;

	enum cam_ahb_clk_vote src_clk_vote;

	struct msm_isp_clk_rates clk_rates;



	if (ahb_cfg)

		vote = msm_isp47_get_cam_clk_vote(ahb_cfg->vote);

	else

		vote = CAM_AHB_SVS_VOTE;



	vfe_dev->hw_info->vfe_ops.platform_ops.get_clk_rates(vfe_dev,

							&clk_rates);

	if (vfe_dev->msm_isp_vfe_clk_rate <= clk_rates.svs_rate)

		src_clk_vote = CAM_AHB_SVS_VOTE;

	else if (vfe_dev->msm_isp_vfe_clk_rate <= clk_rates.nominal_rate)

		src_clk_vote = CAM_AHB_NOMINAL_VOTE;

	else

		src_clk_vote = CAM_AHB_TURBO_VOTE;



	/* vote for higher of the user requested or src clock matched vote */

	if (vote < src_clk_vote)

		vote = src_clk_vote;



	if (vote && vfe_dev->ahb_vote != vote) {

		rc = cam_config_ahb_clk(NULL, 0,
@@ -320,6 +338,7 @@ enable_regulators_failed: 
void msm_vfe47_release_hardware(struct vfe_device *vfe_dev)

{

	enum cam_ahb_clk_client id;

	unsigned long rate = 0;



	/* when closing node, disable all irq */

	vfe_dev->irq0_mask = 0;
@@ -345,6 +364,8 @@ void msm_vfe47_release_hardware(struct vfe_device *vfe_dev) 


	vfe_dev->ahb_vote = CAM_AHB_SUSPEND_VOTE;



	vfe_dev->hw_info->vfe_ops.platform_ops.set_clk_rate(vfe_dev, &rate);



	vfe_dev->hw_info->vfe_ops.platform_ops.enable_clks(

							vfe_dev, 0);

	vfe_dev->hw_info->vfe_ops.platform_ops.enable_regulators(vfe_dev, 0);
@@ -378,8 +399,8 @@ void msm_vfe47_init_hardware_reg(struct vfe_device *vfe_dev) 
	/* BUS_CFG */

	msm_camera_io_w(0x00000101, vfe_dev->vfe_base + 0x84);

	/* IRQ_MASK/CLEAR */

	msm_vfe47_config_irq(vfe_dev, 0x810000E0, 0xFFFFFF7E,

				MSM_ISP_IRQ_ENABLE);

	vfe_dev->hw_info->vfe_ops.irq_ops.config_irq(vfe_dev,

			0x810000E0, 0xFFFFFF7E, MSM_ISP_IRQ_ENABLE);

	msm_camera_io_w(0xFFFFFFFF, vfe_dev->vfe_base + 0x64);

	msm_camera_io_w_mb(0xFFFFFFFF, vfe_dev->vfe_base + 0x68);

	msm_camera_io_w_mb(0x1, vfe_dev->vfe_base + 0x58);
@@ -387,8 +408,8 @@ void msm_vfe47_init_hardware_reg(struct vfe_device *vfe_dev) 


void msm_vfe47_clear_status_reg(struct vfe_device *vfe_dev)

{

	msm_vfe47_config_irq(vfe_dev, 0x80000000, 0x0,

				MSM_ISP_IRQ_SET);

	vfe_dev->hw_info->vfe_ops.irq_ops.config_irq(vfe_dev,

			0x80000000, 0x0, MSM_ISP_IRQ_SET);

	msm_camera_io_w(0xFFFFFFFF, vfe_dev->vfe_base + 0x64);

	msm_camera_io_w_mb(0xFFFFFFFF, vfe_dev->vfe_base + 0x68);

	msm_camera_io_w_mb(0x1, vfe_dev->vfe_base + 0x58);
@@ -536,7 +557,8 @@ void msm_vfe47_read_irq_status(struct vfe_device *vfe_dev, 
		vfe_dev->error_info.camif_status =

		msm_camera_io_r(vfe_dev->vfe_base + 0x4A4);

		/* mask off camif error after first occurrance */

		msm_vfe47_config_irq(vfe_dev, 0, (1 << 0), MSM_ISP_IRQ_DISABLE);

		vfe_dev->hw_info->vfe_ops.irq_ops.config_irq(vfe_dev, 0,

					(1 << 0), MSM_ISP_IRQ_DISABLE);

	}



	if (*irq_status1 & (1 << 7))
@@ -775,7 +797,8 @@ void msm_vfe47_axi_cfg_comp_mask(struct vfe_device *vfe_dev, 
		stream_composite_mask << (comp_mask_index * 8));

	msm_camera_io_w(comp_mask, vfe_dev->vfe_base + 0x74);



	msm_vfe47_config_irq(vfe_dev, 1 << (comp_mask_index + 25), 0,

	vfe_dev->hw_info->vfe_ops.irq_ops.config_irq(vfe_dev,

				1 << (comp_mask_index + 25), 0,

				MSM_ISP_IRQ_ENABLE);

}
@@ -790,7 +813,8 @@ void msm_vfe47_axi_clear_comp_mask(struct vfe_device *vfe_dev, 
	comp_mask &= ~(0x7F << (comp_mask_index * 8));

	msm_camera_io_w(comp_mask, vfe_dev->vfe_base + 0x74);



	msm_vfe47_config_irq(vfe_dev, (1 << (comp_mask_index + 25)), 0,

	vfe_dev->hw_info->vfe_ops.irq_ops.config_irq(vfe_dev,

				(1 << (comp_mask_index + 25)), 0,

				MSM_ISP_IRQ_DISABLE);

}
@@ -799,7 +823,8 @@ void msm_vfe47_axi_cfg_wm_irq_mask(struct vfe_device *vfe_dev, 
{

	int vfe_idx = msm_isp_get_vfe_idx_for_stream(vfe_dev, stream_info);



	msm_vfe47_config_irq(vfe_dev, 1 << (stream_info->wm[vfe_idx][0] + 8), 0,

	vfe_dev->hw_info->vfe_ops.irq_ops.config_irq(vfe_dev,

				1 << (stream_info->wm[vfe_idx][0] + 8), 0,

				MSM_ISP_IRQ_ENABLE);

}
@@ -808,7 +833,8 @@ void msm_vfe47_axi_clear_wm_irq_mask(struct vfe_device *vfe_dev, 
{

	int vfe_idx = msm_isp_get_vfe_idx_for_stream(vfe_dev, stream_info);



	msm_vfe47_config_irq(vfe_dev, (1 << (stream_info->wm[vfe_idx][0] + 8)),

	vfe_dev->hw_info->vfe_ops.irq_ops.config_irq(vfe_dev,

				(1 << (stream_info->wm[vfe_idx][0] + 8)),

				0, MSM_ISP_IRQ_DISABLE);

}
@@ -1060,7 +1086,8 @@ void msm_vfe47_cfg_fetch_engine(struct vfe_device *vfe_dev, 
		temp |= (1 << 1);

		msm_camera_io_w(temp, vfe_dev->vfe_base + 0x84);



		msm_vfe47_config_irq(vfe_dev, (1 << 24), 0,

		vfe_dev->hw_info->vfe_ops.irq_ops.config_irq(vfe_dev,

				(1 << 24), 0,

				MSM_ISP_IRQ_ENABLE);



		temp = fe_cfg->fetch_height - 1;
@@ -1390,7 +1417,8 @@ void msm_vfe47_update_camif_state(struct vfe_device *vfe_dev, 
		msm_camera_io_w(0x0, vfe_dev->vfe_base + 0x64);

		msm_camera_io_w(0x81, vfe_dev->vfe_base + 0x68);

		msm_camera_io_w(0x1, vfe_dev->vfe_base + 0x58);

		msm_vfe47_config_irq(vfe_dev, 0x15, 0x81,

		vfe_dev->hw_info->vfe_ops.irq_ops.config_irq(vfe_dev,

					0x15, 0x81,

					MSM_ISP_IRQ_ENABLE);



		if ((vfe_dev->hvx_cmd > HVX_DISABLE) &&
@@ -1422,7 +1450,7 @@ void msm_vfe47_update_camif_state(struct vfe_device *vfe_dev, 
		if (vfe_dev->axi_data.src_info[VFE_PIX_0].input_mux == TESTGEN)

			update_state = DISABLE_CAMIF;

		/* turn off camif violation and error irqs */

		msm_vfe47_config_irq(vfe_dev, 0, 0x81,

		vfe_dev->hw_info->vfe_ops.irq_ops.config_irq(vfe_dev, 0, 0x81,

					MSM_ISP_IRQ_DISABLE);

		val = msm_camera_io_r(vfe_dev->vfe_base + 0x464);

		/* disable danger signal */
@@ -1447,7 +1475,8 @@ void msm_vfe47_update_camif_state(struct vfe_device *vfe_dev, 
		msm_camera_io_w(0, vfe_dev->vfe_base + 0x64);

		msm_camera_io_w(1 << 0, vfe_dev->vfe_base + 0x68);

		msm_camera_io_w_mb(1, vfe_dev->vfe_base + 0x58);

		msm_vfe47_config_irq(vfe_dev, vfe_dev->irq0_mask,

		vfe_dev->hw_info->vfe_ops.irq_ops.config_irq(vfe_dev,

					vfe_dev->irq0_mask,

					vfe_dev->irq1_mask, MSM_ISP_IRQ_SET);



	}
@@ -1728,7 +1757,8 @@ int msm_vfe47_axi_halt(struct vfe_device *vfe_dev, 
	msm_camera_io_w(val, vfe_dev->vfe_vbif_base + VFE47_VBIF_CLK_OFFSET);



	/* Keep only halt and reset mask */

	msm_vfe47_config_irq(vfe_dev, (1 << 31), (1 << 8),

	vfe_dev->hw_info->vfe_ops.irq_ops.config_irq(vfe_dev,

				(1 << 31), (1 << 8),

				MSM_ISP_IRQ_SET);



	/*Clear IRQ Status0, only leave reset irq mask*/
@@ -1777,7 +1807,8 @@ int msm_vfe47_axi_halt(struct vfe_device *vfe_dev, 
void msm_vfe47_axi_restart(struct vfe_device *vfe_dev,

	uint32_t blocking, uint32_t enable_camif)

{

	msm_vfe47_config_irq(vfe_dev, vfe_dev->irq0_mask, vfe_dev->irq1_mask,

	vfe_dev->hw_info->vfe_ops.irq_ops.config_irq(vfe_dev,

				vfe_dev->irq0_mask, vfe_dev->irq1_mask,

				MSM_ISP_IRQ_SET);

	msm_camera_io_w(0x7FFFFFFF, vfe_dev->vfe_base + 0x64);

	msm_camera_io_w(0xFFFFFEFF, vfe_dev->vfe_base + 0x68);
@@ -1884,7 +1915,8 @@ void msm_vfe47_stats_cfg_comp_mask( 
		comp_mask_reg |= stats_mask << (request_comp_index * 16);

		atomic_set(stats_comp_mask, stats_mask |

				atomic_read(stats_comp_mask));

		msm_vfe47_config_irq(vfe_dev, 1 << (29 + request_comp_index),

		vfe_dev->hw_info->vfe_ops.irq_ops.config_irq(vfe_dev,

				1 << (29 + request_comp_index),

				0, MSM_ISP_IRQ_ENABLE);

	} else {

		if (!(atomic_read(stats_comp_mask) & stats_mask))
@@ -1893,7 +1925,8 @@ void msm_vfe47_stats_cfg_comp_mask( 
		atomic_set(stats_comp_mask,

				~stats_mask & atomic_read(stats_comp_mask));

		comp_mask_reg &= ~(stats_mask << (request_comp_index * 16));

		msm_vfe47_config_irq(vfe_dev, 1 << (29 + request_comp_index),

		vfe_dev->hw_info->vfe_ops.irq_ops.config_irq(vfe_dev,

				1 << (29 + request_comp_index),

				0, MSM_ISP_IRQ_DISABLE);

	}
@@ -1916,32 +1949,41 @@ void msm_vfe47_stats_cfg_wm_irq_mask( 


	switch (STATS_IDX(stream_info->stream_handle[vfe_idx])) {

	case STATS_COMP_IDX_AEC_BG:

		msm_vfe47_config_irq(vfe_dev, 1 << 15, 0, MSM_ISP_IRQ_ENABLE);

		vfe_dev->hw_info->vfe_ops.irq_ops.config_irq(vfe_dev,

				1 << 15, 0, MSM_ISP_IRQ_ENABLE);

		break;

	case STATS_COMP_IDX_HDR_BE:

		msm_vfe47_config_irq(vfe_dev, 1 << 16, 0, MSM_ISP_IRQ_ENABLE);

		vfe_dev->hw_info->vfe_ops.irq_ops.config_irq(vfe_dev,

				1 << 16, 0, MSM_ISP_IRQ_ENABLE);

		break;

	case STATS_COMP_IDX_BG:

		msm_vfe47_config_irq(vfe_dev, 1 << 17, 0, MSM_ISP_IRQ_ENABLE);

		vfe_dev->hw_info->vfe_ops.irq_ops.config_irq(vfe_dev,

				1 << 17, 0, MSM_ISP_IRQ_ENABLE);

		break;

	case STATS_COMP_IDX_BF:

		msm_vfe47_config_irq(vfe_dev, 1 << 18, 1 << 26,

		vfe_dev->hw_info->vfe_ops.irq_ops.config_irq(vfe_dev,

				1 << 18, 1 << 26,

				MSM_ISP_IRQ_ENABLE);

		break;

	case STATS_COMP_IDX_HDR_BHIST:

		msm_vfe47_config_irq(vfe_dev, 1 << 19, 0, MSM_ISP_IRQ_ENABLE);

		vfe_dev->hw_info->vfe_ops.irq_ops.config_irq(vfe_dev,

				1 << 19, 0, MSM_ISP_IRQ_ENABLE);

		break;

	case STATS_COMP_IDX_RS:

		msm_vfe47_config_irq(vfe_dev, 1 << 20, 0, MSM_ISP_IRQ_ENABLE);

		vfe_dev->hw_info->vfe_ops.irq_ops.config_irq(vfe_dev,

				1 << 20, 0, MSM_ISP_IRQ_ENABLE);

		break;

	case STATS_COMP_IDX_CS:

		msm_vfe47_config_irq(vfe_dev, 1 << 21, 0, MSM_ISP_IRQ_ENABLE);

		vfe_dev->hw_info->vfe_ops.irq_ops.config_irq(vfe_dev,

				1 << 21, 0, MSM_ISP_IRQ_ENABLE);

		break;

	case STATS_COMP_IDX_IHIST:

		msm_vfe47_config_irq(vfe_dev, 1 << 22, 0, MSM_ISP_IRQ_ENABLE);

		vfe_dev->hw_info->vfe_ops.irq_ops.config_irq(vfe_dev,

				1 << 22, 0, MSM_ISP_IRQ_ENABLE);

		break;

	case STATS_COMP_IDX_BHIST:

		msm_vfe47_config_irq(vfe_dev, 1 << 23, 0, MSM_ISP_IRQ_ENABLE);

		vfe_dev->hw_info->vfe_ops.irq_ops.config_irq(vfe_dev,

				1 << 23, 0, MSM_ISP_IRQ_ENABLE);

		break;

	default:

		pr_err("%s: Invalid stats idx %d\n", __func__,
@@ -1958,32 +2000,41 @@ void msm_vfe47_stats_clear_wm_irq_mask( 


	switch (STATS_IDX(stream_info->stream_handle[vfe_idx])) {

	case STATS_COMP_IDX_AEC_BG:

		msm_vfe47_config_irq(vfe_dev, 1 << 15, 0, MSM_ISP_IRQ_DISABLE);

		vfe_dev->hw_info->vfe_ops.irq_ops.config_irq(vfe_dev,

				1 << 15, 0, MSM_ISP_IRQ_DISABLE);

		break;

	case STATS_COMP_IDX_HDR_BE:

		msm_vfe47_config_irq(vfe_dev, 1 << 16, 0, MSM_ISP_IRQ_DISABLE);

		vfe_dev->hw_info->vfe_ops.irq_ops.config_irq(vfe_dev,

				1 << 16, 0, MSM_ISP_IRQ_DISABLE);

		break;

	case STATS_COMP_IDX_BG:

		msm_vfe47_config_irq(vfe_dev, 1 << 17, 0, MSM_ISP_IRQ_DISABLE);

		vfe_dev->hw_info->vfe_ops.irq_ops.config_irq(vfe_dev,

				1 << 17, 0, MSM_ISP_IRQ_DISABLE);

		break;

	case STATS_COMP_IDX_BF:

		msm_vfe47_config_irq(vfe_dev, 1 << 18, 1 << 26,

		vfe_dev->hw_info->vfe_ops.irq_ops.config_irq(vfe_dev,

				1 << 18, 1 << 26,

				MSM_ISP_IRQ_DISABLE);

		break;

	case STATS_COMP_IDX_HDR_BHIST:

		msm_vfe47_config_irq(vfe_dev, 1 << 19, 0, MSM_ISP_IRQ_DISABLE);

		vfe_dev->hw_info->vfe_ops.irq_ops.config_irq(vfe_dev,

				1 << 19, 0, MSM_ISP_IRQ_DISABLE);

		break;

	case STATS_COMP_IDX_RS:

		msm_vfe47_config_irq(vfe_dev, 1 << 20, 0, MSM_ISP_IRQ_DISABLE);

		vfe_dev->hw_info->vfe_ops.irq_ops.config_irq(vfe_dev,

				1 << 20, 0, MSM_ISP_IRQ_DISABLE);

		break;

	case STATS_COMP_IDX_CS:

		msm_vfe47_config_irq(vfe_dev, 1 << 21, 0, MSM_ISP_IRQ_DISABLE);

		vfe_dev->hw_info->vfe_ops.irq_ops.config_irq(vfe_dev,

				1 << 21, 0, MSM_ISP_IRQ_DISABLE);

		break;

	case STATS_COMP_IDX_IHIST:

		msm_vfe47_config_irq(vfe_dev, 1 << 22, 0, MSM_ISP_IRQ_DISABLE);

		vfe_dev->hw_info->vfe_ops.irq_ops.config_irq(vfe_dev,

				1 << 22, 0, MSM_ISP_IRQ_DISABLE);

		break;

	case STATS_COMP_IDX_BHIST:

		msm_vfe47_config_irq(vfe_dev, 1 << 23, 0, MSM_ISP_IRQ_DISABLE);

		vfe_dev->hw_info->vfe_ops.irq_ops.config_irq(vfe_dev,

				1 << 23, 0, MSM_ISP_IRQ_DISABLE);

		break;

	default:

		pr_err("%s: Invalid stats idx %d\n", __func__,
@@ -2336,6 +2387,9 @@ int msm_vfe47_set_clk_rate(struct vfe_device *vfe_dev, long *rate) 
		return rc;

	*rate = clk_round_rate(vfe_dev->vfe_clk[clk_idx], *rate);

	vfe_dev->msm_isp_vfe_clk_rate = *rate;



	if (vfe_dev->hw_info->vfe_ops.core_ops.ahb_clk_cfg)

		vfe_dev->hw_info->vfe_ops.core_ops.ahb_clk_cfg(vfe_dev, NULL);

	return 0;

}

drivers/media/platform/msm/camera_v2/isp/msm_isp47.h

+2 −0
Original line number Diff line number Diff line
@@ -193,4 +193,6 @@ int msm_vfe47_update_bandwidth( 
void msm_vfe47_config_irq(struct vfe_device *vfe_dev,

		uint32_t irq0_mask, uint32_t irq1_mask,

		enum msm_isp_irq_operation oper);

int msm_isp47_ahb_clk_cfg(struct vfe_device *vfe_dev,

			struct msm_isp_ahb_clk_cfg *ahb_cfg);

#endif /* __MSM_ISP47_H__ */

drivers/media/platform/msm/camera_v2/isp/msm_isp48.c

+3 −0
Original line number Diff line number Diff line
@@ -246,6 +246,8 @@ struct msm_vfe_hardware_info vfe48_hw_info = { 
	.num_iommu_secure_ctx = 0,

	.vfe_clk_idx = VFE48_SRC_CLK_DTSI_IDX,

	.runtime_axi_update = 1,

	.min_ib = 100000000,

	.min_ab = 100000000,

	.vfe_ops = {

		.irq_ops = {

			.read_irq_status = msm_vfe47_read_irq_status,
@@ -306,6 +308,7 @@ struct msm_vfe_hardware_info vfe48_hw_info = { 
			.process_error_status = msm_vfe47_process_error_status,

			.is_module_cfg_lock_needed =

				msm_vfe47_is_module_cfg_lock_needed,

			.ahb_clk_cfg = msm_isp47_ahb_clk_cfg,

		},

		.stats_ops = {

			.get_stats_idx = msm_vfe47_get_stats_idx,

drivers/media/platform/msm/camera_v2/isp/msm_isp_axi_util.c

+65 −16
Original line number Diff line number Diff line
@@ -1023,34 +1023,35 @@ static void msm_isp_calculate_bandwidth( 
	struct msm_vfe_axi_stream *stream_info)

{

	int bpp = 0;

	struct vfe_device *vfe_dev;

	struct msm_vfe_axi_shared_data *axi_data;

	int i;



	if (stream_info->stream_src < RDI_INTF_0) {

	for (i = 0; i < stream_info->num_isp; i++) {

			axi_data = &stream_info->vfe_dev[i]->axi_data;

		vfe_dev = stream_info->vfe_dev[i];

		axi_data = &vfe_dev->axi_data;

		if (stream_info->stream_src < RDI_INTF_0) {

			stream_info->bandwidth[i] =

				(axi_data->src_info[VFE_PIX_0].pixel_clock /

				(vfe_dev->msm_isp_vfe_clk_rate /

				axi_data->src_info[VFE_PIX_0].width) *

				stream_info->max_width[i];

			stream_info->bandwidth[i] =

				(unsigned long)stream_info->bandwidth[i] *

				stream_info->format_factor / ISP_Q2;

		}

		} else {

			int rdi = SRC_TO_INTF(stream_info->stream_src);

		bpp = msm_isp_get_bit_per_pixel(stream_info->output_format);



			bpp = msm_isp_get_bit_per_pixel(

					stream_info->output_format);

			if (rdi < VFE_SRC_MAX) {

			for (i = 0; i < stream_info->num_isp; i++) {

				axi_data = &stream_info->vfe_dev[i]->axi_data;

				stream_info->bandwidth[i] =

				(axi_data->src_info[rdi].pixel_clock / 8) * bpp;

			}

				(vfe_dev->msm_isp_vfe_clk_rate / 8) * bpp;

			} else {

				pr_err("%s: Invalid rdi interface\n", __func__);

			}

		}

	}

}



#ifdef CONFIG_MSM_AVTIMER

void msm_isp_start_avtimer(void)
@@ -1411,6 +1412,7 @@ static void __msm_isp_axi_stream_update( 
	switch (stream_info->state) {

	case UPDATING:

		stream_info->state = ACTIVE;

		complete_all(&stream_info->active_comp);

		break;

	case STOP_PENDING:

		msm_isp_axi_stream_enable_cfg(stream_info);
@@ -2268,13 +2270,14 @@ int msm_isp_axi_halt(struct vfe_device *vfe_dev, 
int msm_isp_axi_reset(struct vfe_device *vfe_dev,

	struct msm_vfe_axi_reset_cmd *reset_cmd)

{

	int rc = 0, i, k;

	int rc = 0, i, k, j;

	struct msm_vfe_axi_stream *stream_info;

	struct msm_vfe_axi_shared_data *axi_data = &vfe_dev->axi_data;

	uint32_t bufq_handle = 0, bufq_id = 0;

	struct msm_isp_timestamp timestamp;

	unsigned long flags;

	struct vfe_device *update_vfes[MAX_VFE] = {0, 0};

	int vfe_idx;



	if (!reset_cmd) {

		pr_err("%s: NULL pointer reset cmd %pK\n", __func__, reset_cmd);
@@ -2345,6 +2348,20 @@ int msm_isp_axi_reset(struct vfe_device *vfe_dev, 
						ISP_EVENT_BUF_FATAL_ERROR);

					return rc;

				}

				if (stream_info->num_planes > 1) {

					vfe_dev->hw_info->vfe_ops.axi_ops.

					cfg_comp_mask(vfe_dev, stream_info);

				} else {

					vfe_dev->hw_info->vfe_ops.axi_ops.

					cfg_wm_irq_mask(vfe_dev, stream_info);

				}

				vfe_idx = msm_isp_get_vfe_idx_for_stream(

							vfe_dev, stream_info);

				for (j = 0; j < stream_info->num_planes; j++)

					vfe_dev->hw_info->vfe_ops.axi_ops.

						enable_wm(

						vfe_dev->vfe_base,

						stream_info->wm[vfe_idx][j], 1);



				axi_data->src_info[SRC_TO_INTF(stream_info->

					stream_src)].frame_id =
@@ -2731,6 +2748,7 @@ static void __msm_isp_stop_axi_streams(struct msm_vfe_axi_stream **streams, 
						&timestamp);

		msm_isp_cfg_stream_scratch(stream_info, VFE_PING_FLAG);

		msm_isp_cfg_stream_scratch(stream_info, VFE_PONG_FLAG);

		stream_info->undelivered_request_cnt = 0;

		for (k = 0; k < stream_info->num_isp; k++) {

			vfe_dev = stream_info->vfe_dev[k];

			if (stream_info->num_planes > 1)
@@ -2879,6 +2897,8 @@ static int msm_isp_start_axi_stream(struct vfe_device *vfe_dev_ioctl, 
	msm_isp_get_timestamp(&timestamp);



	for (i = 0; i < stream_cfg_cmd->num_streams; i++) {

		if (stream_cfg_cmd->stream_handle[i] == 0)

			continue;

		stream_info = msm_isp_get_stream_common_data(vfe_dev_ioctl,

			HANDLE_TO_IDX(stream_cfg_cmd->stream_handle[i]));

		if (SRC_TO_INTF(stream_info->stream_src) < VFE_SRC_MAX)
@@ -3018,6 +3038,8 @@ static int msm_isp_stop_axi_stream(struct vfe_device *vfe_dev_ioctl, 
		return -EINVAL;



	for (i = 0; i < stream_cfg_cmd->num_streams; i++) {

		if (stream_cfg_cmd->stream_handle[i] == 0)

			continue;

		stream_info = msm_isp_get_stream_common_data(vfe_dev_ioctl,

			HANDLE_TO_IDX(stream_cfg_cmd->stream_handle[i]));
@@ -3044,12 +3066,37 @@ int msm_isp_cfg_axi_stream(struct vfe_device *vfe_dev, void *arg) 
{

	int rc = 0, ret;

	struct msm_vfe_axi_stream_cfg_cmd *stream_cfg_cmd = arg;

	uint32_t stream_idx[MAX_NUM_STREAM];

	int i;

	int vfe_idx;

	struct msm_vfe_axi_stream *stream_info;



	memset(stream_idx, 0, sizeof(stream_idx));



	for (i = 0; i < stream_cfg_cmd->num_streams; i++) {

		if (HANDLE_TO_IDX(stream_cfg_cmd->stream_handle[i]) >=

			VFE_AXI_SRC_MAX)

			return -EINVAL;

		stream_info = msm_isp_get_stream_common_data(vfe_dev,

			HANDLE_TO_IDX(stream_cfg_cmd->stream_handle[i]));

		vfe_idx = msm_isp_get_vfe_idx_for_stream_user(vfe_dev,

								stream_info);

		if (vfe_idx == -ENOTTY || stream_info->stream_handle[vfe_idx] !=

					stream_cfg_cmd->stream_handle[i]) {

			pr_err("%s: Invalid stream handle %x vfe_idx %d expected %x\n",

				__func__, stream_cfg_cmd->stream_handle[i],

				vfe_idx,

				(vfe_idx != -ENOTTY) ?

				stream_info->stream_handle[vfe_idx] : 0);

			return -EINVAL;

		}

		/* check for duplicate stream handle */

		if (stream_idx[stream_info->stream_src] ==

			stream_cfg_cmd->stream_handle[i])

			stream_cfg_cmd->stream_handle[i] = 0;

		else

			stream_idx[stream_info->stream_src] =

				stream_cfg_cmd->stream_handle[i];

	}

	if (stream_cfg_cmd->cmd == START_STREAM) {

		msm_isp_axi_update_cgc_override(vfe_dev, stream_cfg_cmd, 1);
@@ -3387,9 +3434,11 @@ static void msm_isp_remove_buf_queue(struct vfe_device *vfe_dev, 


	if (stream_info->bufq_handle[bufq_id]) {

		stream_info->bufq_handle[bufq_id] = 0;

		if (stream_info->state == ACTIVE)

		if (stream_info->state == ACTIVE) {

			init_completion(&stream_info->active_comp);

			stream_info->state = UPDATING;

		}

	}

	spin_unlock_irqrestore(&stream_info->lock, flags);

	if (stream_info->state == UPDATING)

		msm_isp_axi_wait_for_stream_cfg_done(stream_info, 1);