Loading arch/arm/boot/dts/qcom/msm8996-gpu.dtsi +34 −0 Original line number Diff line number Diff line Loading @@ -129,6 +129,40 @@ vddcx-supply = <&gdsc_gpu>; vdd-supply = <&gdsc_gpu_gx>; /* GPU Mempools */ qcom,gpu-mempools { #address-cells= <1>; #size-cells = <0>; compatible = "qcom,gpu-mempools"; /* 4K Page Pool configuration */ qcom,gpu-mempool@0 { reg = <0>; qcom,mempool-page-size = <4096>; qcom,mempool-reserved = <2048>; qcom,mempool-allocate; }; /* 8K Page Pool configuration */ qcom,gpu-mempool@1 { reg = <1>; qcom,mempool-page-size = <8192>; qcom,mempool-reserved = <1024>; qcom,mempool-allocate; }; /* 64K Page Pool configuration */ qcom,gpu-mempool@2 { reg = <2>; qcom,mempool-page-size = <65536>; qcom,mempool-reserved = <256>; }; /* 1M Page Pool configuration */ qcom,gpu-mempool@3 { reg = <3>; qcom,mempool-page-size = <1048576>; qcom,mempool-reserved = <32>; }; }; /* Power levels */ qcom,gpu-pwrlevels { #address-cells = <1>; Loading arch/arm/boot/dts/qcom/msmcobalt-gpu.dtsi +34 −0 Original line number Diff line number Diff line Loading @@ -122,6 +122,40 @@ vddcx-supply = <&gdsc_gpu_cx>; vdd-supply = <&gdsc_gpu_gx>; /* GPU Mempools */ qcom,gpu-mempools { #address-cells= <1>; #size-cells = <0>; compatible = "qcom,gpu-mempools"; /* 4K Page Pool configuration */ qcom,gpu-mempool@0 { reg = <0>; qcom,mempool-page-size = <4096>; qcom,mempool-reserved = <2048>; qcom,mempool-allocate; }; /* 8K Page Pool configuration */ qcom,gpu-mempool@1 { reg = <1>; qcom,mempool-page-size = <8192>; qcom,mempool-reserved = <1024>; qcom,mempool-allocate; }; /* 64K Page Pool configuration */ qcom,gpu-mempool@2 { reg = <2>; qcom,mempool-page-size = <65536>; qcom,mempool-reserved = <256>; }; /* 1M Page Pool configuration */ qcom,gpu-mempool@3 { reg = <3>; qcom,mempool-page-size = <1048576>; qcom,mempool-reserved = <32>; }; }; /* Power levels */ qcom,gpu-pwrlevels { #address-cells = <1>; Loading Loading
arch/arm/boot/dts/qcom/msm8996-gpu.dtsi +34 −0 Original line number Diff line number Diff line Loading @@ -129,6 +129,40 @@ vddcx-supply = <&gdsc_gpu>; vdd-supply = <&gdsc_gpu_gx>; /* GPU Mempools */ qcom,gpu-mempools { #address-cells= <1>; #size-cells = <0>; compatible = "qcom,gpu-mempools"; /* 4K Page Pool configuration */ qcom,gpu-mempool@0 { reg = <0>; qcom,mempool-page-size = <4096>; qcom,mempool-reserved = <2048>; qcom,mempool-allocate; }; /* 8K Page Pool configuration */ qcom,gpu-mempool@1 { reg = <1>; qcom,mempool-page-size = <8192>; qcom,mempool-reserved = <1024>; qcom,mempool-allocate; }; /* 64K Page Pool configuration */ qcom,gpu-mempool@2 { reg = <2>; qcom,mempool-page-size = <65536>; qcom,mempool-reserved = <256>; }; /* 1M Page Pool configuration */ qcom,gpu-mempool@3 { reg = <3>; qcom,mempool-page-size = <1048576>; qcom,mempool-reserved = <32>; }; }; /* Power levels */ qcom,gpu-pwrlevels { #address-cells = <1>; Loading
arch/arm/boot/dts/qcom/msmcobalt-gpu.dtsi +34 −0 Original line number Diff line number Diff line Loading @@ -122,6 +122,40 @@ vddcx-supply = <&gdsc_gpu_cx>; vdd-supply = <&gdsc_gpu_gx>; /* GPU Mempools */ qcom,gpu-mempools { #address-cells= <1>; #size-cells = <0>; compatible = "qcom,gpu-mempools"; /* 4K Page Pool configuration */ qcom,gpu-mempool@0 { reg = <0>; qcom,mempool-page-size = <4096>; qcom,mempool-reserved = <2048>; qcom,mempool-allocate; }; /* 8K Page Pool configuration */ qcom,gpu-mempool@1 { reg = <1>; qcom,mempool-page-size = <8192>; qcom,mempool-reserved = <1024>; qcom,mempool-allocate; }; /* 64K Page Pool configuration */ qcom,gpu-mempool@2 { reg = <2>; qcom,mempool-page-size = <65536>; qcom,mempool-reserved = <256>; }; /* 1M Page Pool configuration */ qcom,gpu-mempool@3 { reg = <3>; qcom,mempool-page-size = <1048576>; qcom,mempool-reserved = <32>; }; }; /* Power levels */ qcom,gpu-pwrlevels { #address-cells = <1>; Loading