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Commit 87cdd922 authored by Hareesh Gundu's avatar Hareesh Gundu Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: Add GPU mempools properties for all msm 



Add initial set of configuration for GPU mempools
to reserve page pools at init time of kgsl driver.

CRs-Fixed: 1064046
Change-Id: Ie6789e13be7316a0de43538b9e477920fa64c6bb
Signed-off-by: default avatarHareesh Gundu <hareeshg@codeaurora.org>
parent 4a91ea36

arch/arm/boot/dts/qcom/msm8996-gpu.dtsi

+34 −0
Original line number Diff line number Diff line
@@ -129,6 +129,40 @@ 
		vddcx-supply = <&gdsc_gpu>;

		vdd-supply = <&gdsc_gpu_gx>;



		/* GPU Mempools */

		qcom,gpu-mempools {

			#address-cells= <1>;

			#size-cells = <0>;

			compatible = "qcom,gpu-mempools";



			/* 4K Page Pool configuration */

			qcom,gpu-mempool@0 {

				reg = <0>;

				qcom,mempool-page-size = <4096>;

				qcom,mempool-reserved = <2048>;

				qcom,mempool-allocate;

			};

			/* 8K Page Pool configuration */

			qcom,gpu-mempool@1 {

				reg = <1>;

				qcom,mempool-page-size  = <8192>;

				qcom,mempool-reserved = <1024>;

				qcom,mempool-allocate;

			};

			/* 64K Page Pool configuration */

			qcom,gpu-mempool@2 {

				reg = <2>;

				qcom,mempool-page-size  = <65536>;

				qcom,mempool-reserved = <256>;

			};

			/* 1M Page Pool configuration */

			qcom,gpu-mempool@3 {

				reg = <3>;

				qcom,mempool-page-size  = <1048576>;

				qcom,mempool-reserved = <32>;

			};

		};



		/* Power levels */

		qcom,gpu-pwrlevels {

			#address-cells = <1>;

arch/arm/boot/dts/qcom/msmcobalt-gpu.dtsi

+34 −0
Original line number Diff line number Diff line
@@ -119,6 +119,40 @@ 
		vddcx-supply = <&gdsc_gpu_cx>;

		vdd-supply = <&gdsc_gpu_gx>;



		/* GPU Mempools */

		qcom,gpu-mempools {

			#address-cells= <1>;

			#size-cells = <0>;

			compatible = "qcom,gpu-mempools";



			/* 4K Page Pool configuration */

			qcom,gpu-mempool@0 {

				reg = <0>;

				qcom,mempool-page-size = <4096>;

				qcom,mempool-reserved = <2048>;

				qcom,mempool-allocate;

			};

			/* 8K Page Pool configuration */

			qcom,gpu-mempool@1 {

				reg = <1>;

				qcom,mempool-page-size  = <8192>;

				qcom,mempool-reserved = <1024>;

				qcom,mempool-allocate;

			};

			/* 64K Page Pool configuration */

			qcom,gpu-mempool@2 {

				reg = <2>;

				qcom,mempool-page-size  = <65536>;

				qcom,mempool-reserved = <256>;

			};

			/* 1M Page Pool configuration */

			qcom,gpu-mempool@3 {

				reg = <3>;

				qcom,mempool-page-size  = <1048576>;

				qcom,mempool-reserved = <32>;

			};

		};



		/* Power levels */

		qcom,gpu-pwrlevels {

			#address-cells = <1>;