Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit bdad0548 authored by Grzegorz Bernacki's avatar Grzegorz Bernacki Committed by Grant Likely
Browse files

powerpc/5200: Add support for the digsy MTC board. 



Board support for the InterControl Digsy-MTC device based on the MPC5200B SoC.

Signed-off-by: default avatarGrzegorz Bernacki <gjb@semihalf.com>
Signed-off-by: default avatarGrant Likely <grant.likely@secretlab.ca>
parent bfee95bb

arch/powerpc/boot/dts/digsy_mtc.dts

0 → 100644
+254 −0
Original line number Diff line number Diff line 
/*

 * Digsy MTC board Device Tree Source

 *

 * Copyright (C) 2009 Semihalf

 *

 * Based on the CM5200 by M. Balakowicz

 *

 * This program is free software; you can redistribute  it and/or modify it

 * under  the terms of  the GNU General  Public License as published by the

 * Free Software Foundation;  either version 2 of the  License, or (at your

 * option) any later version.

 */



/dts-v1/;



/ {

	model = "intercontrol,digsy-mtc";

	compatible = "intercontrol,digsy-mtc";

	#address-cells = <1>;

	#size-cells = <1>;

	interrupt-parent = <&mpc5200_pic>;



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;



		PowerPC,5200@0 {

			device_type = "cpu";

			reg = <0>;

			d-cache-line-size = <32>;

			i-cache-line-size = <32>;

			d-cache-size = <0x4000>;		// L1, 16K

			i-cache-size = <0x4000>;		// L1, 16K

			timebase-frequency = <0>;	// from bootloader

			bus-frequency = <0>;		// from bootloader

			clock-frequency = <0>;		// from bootloader

		};

	};



	memory {

		device_type = "memory";

		reg = <0x00000000 0x02000000>;	// 32MB

	};



	soc5200@f0000000 {

		#address-cells = <1>;

		#size-cells = <1>;

		compatible = "fsl,mpc5200b-immr";

		ranges = <0 0xf0000000 0x0000c000>;

		reg = <0xf0000000 0x00000100>;

		bus-frequency = <0>;		// from bootloader

		system-frequency = <0>;		// from bootloader



		cdm@200 {

			compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";

			reg = <0x200 0x38>;

		};



		mpc5200_pic: interrupt-controller@500 {

			// 5200 interrupts are encoded into two levels;

			interrupt-controller;

			#interrupt-cells = <3>;

			compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";

			reg = <0x500 0x80>;

		};



		timer@600 {	// General Purpose Timer

			compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";

			reg = <0x600 0x10>;

			interrupts = <1 9 0>;

			fsl,has-wdt;

		};



		timer@610 {	// General Purpose Timer

			compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";

			reg = <0x610 0x10>;

			interrupts = <1 10 0>;

		};



		timer@620 {	// General Purpose Timer

			compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";

			reg = <0x620 0x10>;

			interrupts = <1 11 0>;

		};



		timer@630 {	// General Purpose Timer

			compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";

			reg = <0x630 0x10>;

			interrupts = <1 12 0>;

		};



		timer@640 {	// General Purpose Timer

			compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";

			reg = <0x640 0x10>;

			interrupts = <1 13 0>;

		};



		timer@650 {	// General Purpose Timer

			compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";

			reg = <0x650 0x10>;

			interrupts = <1 14 0>;

		};



		timer@660 {	// General Purpose Timer

			compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";

			reg = <0x660 0x10>;

			interrupts = <1 15 0>;

		};



		timer@670 {	// General Purpose Timer

			compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";

			reg = <0x670 0x10>;

			interrupts = <1 16 0>;

		};



		gpio_simple: gpio@b00 {

			compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";

			reg = <0xb00 0x40>;

			interrupts = <1 7 0>;

			gpio-controller;

			#gpio-cells = <2>;

		};



		gpio_wkup: gpio@c00 {

			compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";

			reg = <0xc00 0x40>;

			interrupts = <1 8 0 0 3 0>;

			gpio-controller;

			#gpio-cells = <2>;

		};



		spi@f00 {

			compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";

			reg = <0xf00 0x20>;

			interrupts = <2 13 0 2 14 0>;

		};



		usb@1000 {

			compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";

			reg = <0x1000 0xff>;

			interrupts = <2 6 0>;

		};



		dma-controller@1200 {

			compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";

			reg = <0x1200 0x80>;

			interrupts = <3 0 0  3 1 0  3 2 0  3 3 0

			              3 4 0  3 5 0  3 6 0  3 7 0

			              3 8 0  3 9 0  3 10 0  3 11 0

			              3 12 0  3 13 0  3 14 0  3 15 0>;

		};



		xlb@1f00 {

			compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";

			reg = <0x1f00 0x100>;

		};



		serial@2400 {		// PSC3

			compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";

			reg = <0x2400 0x100>;

			interrupts = <2 3 0>;

		};



		serial@2600 {		// PSC4

			compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";

			reg = <0x2600 0x100>;

			interrupts = <2 11 0>;

		};



		ethernet@3000 {

			compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";

			reg = <0x3000 0x400>;

			local-mac-address = [ 00 00 00 00 00 00 ];

			interrupts = <2 5 0>;

			phy-handle = <&phy0>;

		};



		mdio@3000 {

			#address-cells = <1>;

			#size-cells = <0>;

			compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";

			reg = <0x3000 0x400>;       // fec range, since we need to setup fec interrupts

			interrupts = <2 5 0>;   // these are for "mii command finished", not link changes & co.



			phy0: ethernet-phy@0 {

				reg = <0>;

			};

		};



		ata@3a00 {

			compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";

			reg = <0x3a00 0x100>;

			interrupts = <2 7 0>;

		};



		i2c@3d00 {

			#address-cells = <1>;

			#size-cells = <0>;

			compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";

			reg = <0x3d00 0x40>;

			interrupts = <2 15 0>;

			fsl5200-clocking;



			rtc@50 {

				compatible = "at,24c08";

				reg = <0x50>;

			};



			rtc@68 {

				compatible = "dallas,ds1339";

				reg = <0x68>;

			};

		};



		sram@8000 {

			compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";

			reg = <0x8000 0x4000>;

		};

	};



	lpb {

		compatible = "fsl,mpc5200b-lpb","simple-bus";

		#address-cells = <2>;

		#size-cells = <1>;

		ranges = <0 0 0xff000000 0x1000000>;



		// 16-bit flash device at LocalPlus Bus CS0

		flash@0,0 {

			compatible = "cfi-flash";

			reg = <0 0 0x1000000>;

			bank-width = <2>;

			device-width = <2>;

			#size-cells = <1>;

			#address-cells = <1>;



			partition@0 {

				label = "kernel";

				reg = <0x0 0x00200000>;

			};

			partition@200000 {

				label = "root";

				reg = <0x00200000 0x00300000>;

			};

			partition@500000 {

				label = "user";

				reg = <0x00500000 0x00a00000>;

			};

			partition@f00000 {

				label = "u-boot";

				reg = <0x00f00000 0x100000>;

			};

		};

	};

};

arch/powerpc/platforms/52xx/Kconfig

+6 −1
Original line number Diff line number Diff line
@@ -21,7 +21,12 @@ config PPC_MPC5200_SIMPLE 
	    and if there is a PCI bus node defined in the device tree.



	  Boards that are compatible with this generic platform support

	  are: 'tqc,tqm5200', 'promess,motionpro', 'schindler,cm5200'.

	  are:

	     intercontrol,digsy-mtc

	     phytec,pcm030

	     promess,motionpro

	     schindler,cm5200

	     tqc,tqm5200



config PPC_EFIKA

	bool "bPlan Efika 5k2. MPC5200B based computer"

arch/powerpc/platforms/52xx/mpc5200_simple.c

+1 −0
Original line number Diff line number Diff line
@@ -50,6 +50,7 @@ static void __init mpc5200_simple_setup_arch(void) 


/* list of the supported boards */

static char *board[] __initdata = {

	"intercontrol,digsy-mtc",

	"promess,motionpro",

	"phytec,pcm030",

	"schindler,cm5200",