Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit b9d146e3 authored by Bjorn Helgaas's avatar Bjorn Helgaas
Browse files

iwlwifi: collapse wrapper for pcie_capability_read_word() 



iwl_pciexp_link_ctrl() has only one call site and no longer provides any
useful abstraction, so collapse it into the caller.

Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Acked-by: default avatarJohannes Berg <johannes.berg@intel.com>
parent f93eaffc

drivers/net/wireless/iwlwifi/pcie/trans.c

+3 −10
Original line number Diff line number Diff line
@@ -673,18 +673,11 @@ static void iwl_set_pwr_vmain(struct iwl_trans *trans) 
#define PCI_CFG_LINK_CTRL_VAL_L0S_EN	0x01

#define PCI_CFG_LINK_CTRL_VAL_L1_EN	0x02



static u16 iwl_pciexp_link_ctrl(struct iwl_trans *trans)

static void iwl_apm_config(struct iwl_trans *trans)

{

	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);

	u16 pci_lnk_ctl;



	pcie_capability_read_word(trans_pcie->pci_dev, PCI_EXP_LNKCTL,

				  &pci_lnk_ctl);

	return pci_lnk_ctl;

}

	u16 lctl;



static void iwl_apm_config(struct iwl_trans *trans)

{

	/*

	 * HW bug W/A for instability in PCIe bus L0S->L1 transition.

	 * Check if BIOS (or OS) enabled L1-ASPM on this device.
@@ -693,8 +686,8 @@ static void iwl_apm_config(struct iwl_trans *trans) 
	 * If not (unlikely), enable L0S, so there is at least some

	 *    power savings, even without L1.

	 */

	u16 lctl = iwl_pciexp_link_ctrl(trans);



	pcie_capability_read_word(trans_pcie->pci_dev, PCI_EXP_LNKCTL, &lctl);

	if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==

				PCI_CFG_LINK_CTRL_VAL_L1_EN) {

		/* L1-ASPM enabled; disable(!) L0S */