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Commit b0f3600e authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "clk: qcom: Update the hmss_gpll0_clk_src to 300MHz"

parents 00dfbd4a 7d46078d

drivers/clk/qcom/clk-cpu-osm.c

+1 −1
Original line number Diff line number Diff line
@@ -772,7 +772,7 @@ static const char * const gcc_parent_names_1[] = { 
};



static struct freq_tbl ftbl_osm_clk_src[] = {

	F(200000000, LMH_LITE_CLK_SRC, 3, 0, 0),

	F(200000000, LMH_LITE_CLK_SRC, 1.5, 0, 0),

	{ }

};

drivers/clk/qcom/gcc-sdm660.c

+4 −0
Original line number Diff line number Diff line
@@ -732,6 +732,7 @@ static struct clk_rcg2 gp3_clk_src = { 
};



static const struct freq_tbl ftbl_hmss_gpll0_clk_src[] = {

	F(300000000, P_GPLL0_OUT_MAIN, 2, 0, 0),

	F(600000000, P_GPLL0_OUT_MAIN, 1, 0, 0),

	{ }

};
@@ -2755,6 +2756,9 @@ static int gcc_660_probe(struct platform_device *pdev) 
	/* Keep bimc gfx clock port on all the time */

	clk_prepare_enable(gcc_bimc_gfx_clk.clkr.hw.clk);



	/* Set the HMSS_GPLL0_SRC for 300MHz to CPU subsystem */

	clk_set_rate(hmss_gpll0_clk_src.clkr.hw.clk, 300000000);



	dev_info(&pdev->dev, "Registered GCC clocks\n");



	return ret;