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Commit aa36bb38 authored by Linux Build Service Account's avatar Linux Build Service Account
Browse files

Promotion of kernel.lnx.4.4-161227.

CRs      Change ID                                   Subject
--------------------------------------------------------------------------------------------------------------
1104858   I482bbf480d4129cdc6a1dfe08f37a1ec56c3131e   clk: qcom: Add FORCE_ENABLE_RCGR & CLK_ENABLE_HAND_OFF f
1104679   I53ac153ba9f7ae81bb0657b17e0e798fd3fe4f48   power_supply: Add SOC_REPORTING_READY property
1104679   I415e322e99bacd61c4e9ac921643d87d3eec4b3e   power: qpnp-fg-gen3: add SOC_REPORTING_READY property
1068294   I779074d0aba35827e1a8264385149967cb9973f3   regulator: cpr4-mmss: Add mmss CPR platform specific dri
1105323   I073ab59cc4ef1b71545a9e77b76d94f09d659aac   msm_11ad: Add option to enable SMMU fastmap
1102641   I39a1266f4158e71238f374b6cba49e1a8c2b1a3b   leds: qpnp-wled: Update WLED config
1104760   I2f9b4e9d45f95066ec93bb5fab179a14bc2c62ee   power: reset: Store KASLR offset in IMEM
986540   I711354941b4168f3f6ffe2d29185597bdad4da89   spi: spi_qsd: Fix the register peek/poke debug feature
1102726   I806456737485dfcbca8a71d59db0927bbd843708   clk: qcom: add MDSS PLL support for msmfalcon
1093863   I47cfe2cd7d93ba5db57365cf250c600dac22bab1   i2c-msm-v2:Synchronise runtime PM callback operations
1102841   I2661a639c19dd451f22c9a29d7d75d9b3fb98114   msm: mdss: Initialize mdss v3 pp driver ops for msmfalco
1101084   I334fd782a2c5d604cafb94f44832d9c700891ba2   msm: thermal: Update error handling of device offline
1105169   Ib089e7ddd38d0d15285ed65c8a29039451cfc3c5   ARM: dts: msm: Add initial support for msm8998 QRD SKUK
1104865   Ib1291524c53c4ec757a494a1e08cb0925720e1a6   msm: rtb: record counter timestamp for every log record
1081961   I5680dc5333c9664e1316c29a91e29231f15eb4f1   defconfig: msm: Add support for CPU OSM clock
1094763   Ifd41990058f8bbce8ba488770ffbfcd9b6067ad6   ASoC: msm: add support for WCD interrupt config via LPI
1103739   Ie5474c42ccdd88df4c101b2113ca8d924eddf037   usb: phy: qusb2: Switch to SE clk from diff clk upon sus
1068294   I2111fe55c9335d57ac91f18f4a4fb3689d80660d   defconfig: Compile GFX LDO regulator driver for msmfalco
1046799   I47db9f66c95846dbff882f631b915655c33c3d55   spi: spi_qsd: Don't restrict first transfer in FIFO mode
1104607   Ie85f7ede2d91767d0d5d20c90a481e6365ad7189   ARM: dts: msm: Add thermal mitigation properties to msmt
1104981   I476397d88e0f9d2b32ae375afc6f15eca4b9ec95   ARM: dts: msm: Add initial support for msm8998 QRD SKUK
1098662   I214bb19385f855af61da628fdf1cf7efc5dd08d6   msm: mdss: dp: fix calculation of link rate
1102900   Ide652165711eec23644d36837f3847d896293709   msm: mdss: Add mdss capabilities for msmfalcon
1104876   I9a707d953a85c16c9c5be82fd36960b49da36e3c   smcinvoke: support listener service request
1104976   Ic8c9657752271026d796ecd6c3b9f9f46f831f37   ARM: dts: msm: update icnss device node for msm8998-inte
1052835   I7f1419c8f7fd7c371767f6921afe0cd8cfaad18f   msm: camera: Change %p into %pK
1081961   I0aca021e51ef9ae59dedce855430a63937eb98c6   ARM: dts: msm: Add support for CPU clocks for msmfalcon
1076516   I290ec786bbe5c45873265ea74290eefcd3d16cb1   msm: mdss: dp: add support for PHY compliance tests
1100632   Iab69062336966e61683117a17974f46cd8f513aa   ARM: dts: msm: Allocate memory for diag client for msmfa
1103405   Iaaa69a56f13db9304640f115863bb882c72551a8   ARM: dts: msm: Update VA range for venus_ns and modify c
1083444   Ie2702223379b9c77ce4fe30376d446c63223dbc8   diag: dci: Fix possible dangling reference
1102776   I77f8e6de6f1b5c447a3516380c51db9c7129d2f3   spcom: abort any read() operation on SSR
1094456   Ib5247f6bceb1f555c03103f061af089755b2de62   clk: introduce CLK_ENABLE_HAND_OFF flag
1094763   Ib17d8bbd5894be5fbf3fa0cafdbec958abc42649   ARM: dts: msm: Enable audio internal codec nodes for msm
1103891   Iec6247a69c3258660eae398d6e3fe8215e3f254a   ARM: dts: msm: Add TP device node into msm8998 interpose
1104880 868394   I885ae66be2d8cca17bcc0b87b7635a71c734e4b2   usb/xhci: Add support for EHSET tests for host complianc
1094456   I7d527571c2eb4d53d58d82126989bd673de12e2d   clk: move check for CLK_ENABLE_HAND_OFF at unused tree
1093271   I472449c52bff40d48f7d65b05e145cc47cba9357   msm: crypto: fix AEAD issues for HW crypto driver on msm
1105038   I45d13b40fab9bf6686277c0c26a07668410cdfb2   usb: gadget: u_data_ipa: Fix condition check for IPA pip
1081961   I389cc9e93a26a434be752cf74444d6c0985ff36d   clk: qcom: Support CPU clock for OSM for common clock fr
1104001   Ib4cc69afb32a7654bbdd98f2efff901729c4d3da   clk: qcom: Add voltage voting for MSM8996 GCC driver
1104876   Ifeed957b99d2becd986629f60e145d6fdb717244   qseecom: support listener request for smcinvoke
1105100   Ic64d89b960c5effada93118d67a30cc051640be2   ARM: dts: msm: set rcu_expedited for msmfalcon and msmtr
1104853   If624bf14e8588e50fa6a97d29b528d7d02ef64dc   ARM: dts: msm: disable soft hot JEITA for 8998 QRD SKUK
1099484   I58c30a50c7834e7897daa2849b9885b3e797cf07   ARM: dts: msm: enable vdd and vdd-io for sdhc_2 on msm89
1099101   I41ab0baf1bbe6ccda6b8da2ecd077bea2a388e56   ASoC: msm: Check prepare state to avoid duplicate channe
1104977   I575aecb616a56974ec2680e5888190adb40c969a   ARM: dts: msm: set wled string/full scale current for QR
1092969   I6e315eec256f01c143ffc8b463279f2b30e64610   input: qpnp-power-on: Set ship mode in system_pwr_off
1104886   Ic44359e224e0f9070238748bd9b16eed35974ba6   ARM: dts: msm: add support of PM3FALCON based MSMFALCON
1097878   I3f895deaae3acf329088cf8135859cc41e781763   drivers: soc: qcom: Add error handling in function avtim
1104880   I88f2748f0c8cf96fe7f6ab9ebaa82d51ec97f4fd   defconfig: msmcortex: Enable EHSET Test Fixture device d
1104760   I456c62764c88149b785ecf1d65691ea5a775c1db   ARM: dts: msm: Add kaslr offset IMEM entry for msm8998
1104607   I780f9187256596d6f5d93b3847dc98a3c410a51e   ARM: dts: msm: Configure lmh hardware for msmtriton
1104928   I6aad9916c92d2f775632406374dbb803063148de   input: misc: fix heap overflow issue in hbtp_input.c
1101260   I6d59c7804d0dac5087e9b0e6c4a0cdacb5ddf3db   ARM: dts: msm: Add support for new flash mode on msm8998
1100528   I1fd7b7e7324b79544608a9d9ce73aa53608d1f3e   RM: dts: Update SD card Detect GPIO for msmfalcon
1104880   I638ca552f6dae735147378f3e6f6068e0003094b   usb: xhci: Add support for SINGLE_STEP_SET_FEATURE test
1103468   I547d792b38649aa1d60525b0dc335791b37989fd   msm: kgsl: Do a midframe sampling of power stats if enab
1104607   Id65a720d20fb34b9b5dccf8626af00a1d0519ce3   ARM: dts: msm: Add thermal sensor info for msmtriton
1100213   I29572841624c1cb96d85e2dcfe620b455867d41e   ARM: dts: msm: add devfreq nodes to msmfalcon target
1100018   I8e7c4be090107618cd6cbac394a57f109f8a1ced   usb: gadget: f_qc_rndis: Fix double-free in qcrndis_free
1084177   I2bbe7be3daedef45a5990c23168df5185e72e82f   msm: sensor: correcting return value for get actuator in
1102137   I2fce80cec72e3bd8b1561fd46fa1a1520cddd294   msm: mdss: dp: fix handling of link training mutex
1102584   Idd40a0b471293048833b34dda3ac5044a87fc3c9   ASoC: wcd934x: Fix headset TX mode setting
1103939   I03e4a8e10452ef53d8e35e7cee44bdf51f53483b   ARM: dts: msm: Add support for home hard key at QRD8998H
1098041   I8cc22af138a343cd387f4400cff487faa66b3da0   ASoC: wcd934x: Update class-H parameters based on headph
1095411   Ie639a26543e2f20b61d6dfc73b3bcbd6a43b24be   msm: mdss: Move PP programming after mdp wait for ping p
1093271   I406a41ac961757d31209ae0a0a4b4d9cc4d31a1e   defconfig: msm: disable CRYPTO_DEC_QCE device on msm8998
1104183   I58e19def0042022046e730dd97008a9e1c25b6d6   icnss: Add EXEC permission when assigning the MSA0 back
1104001   Ie596ddee60aac3e6fc996f9a3e8dc988b0f4aa88   clk: qcom: Add smd-rpm voter & voter branch clocks for M
1102726   I49efddea0228e3129d36eabc102d6df0fcd53d12   ARM: dts: msm: add mdss node for msmfalcon target
1099101   I1e76eb2e1c575b433e3899ae2471719bf68ab1c1   ASoC: msm: decrement slim channel ref to set the propert
1105246   I4de26881620dde4230d0a907bd0fd39bebe2bb3d   wil6210: missing reinit_completion in wmi_call

Change-Id: I0c6d90c668b09a08de714b3bcd03e1e513f1853a
CRs-Fixed: 1102584, 986540, 1104976, 1076516, 1104977, 1100018, 1102841, 1105100, 1104880, 1102900, 1081961, 1103939, 1104865, 1104679, 1105169, 1084177, 1105038, 1102641, 1099484, 1046799, 1052835, 1102137, 1098662, 1104853, 1098041, 1095411, 1083444, 1100632, 1104981, 1104858, 1100213, 1104607, 1093271, 1104928, 1102726, 1104876, 1093863, 1099101, 1103891, 1092969, 868394, 1094763, 1105246, 1103739, 1105323, 1094456, 1104760, 1101260, 1100528, 1097878, 1104886, 1104001, 1103468, 1102776, 1068294, 1101084, 1104183, 1103405
parents 7aa1be41 55e8426a
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+11 −0
Original line number Diff line number Diff line
@@ -63,6 +63,11 @@ Emergency Download Mode:
-compatible: "qcom,msm-imem-emergency_download_mode"
-reg: start address and size of emergency_download_mode region in imem

Kaslr Offset:
------------------------
-compatible: "qcom,msm-imem-kaslr_offset"
-reg: start address and size of kaslr_offset region in imem

USB Diag Cookies:
-----------------
Memory region used to store USB PID and serial numbers to be used by
@@ -101,6 +106,12 @@ Example:
			reg = <0x6b0 32>;
		};

		kaslr_offset@6d0 {
			compatible = "qcom,msm-imem-kaslr_offset";
			reg = <0x6d0 12>;
		};


		pil@94c {
			compatible = "qcom,msm-imem-pil";
			reg = <0x94c 200>;
+3 −2
Original line number Diff line number Diff line
@@ -9,8 +9,9 @@ Properties:
- compatible
	Usage:      required
	Value type: <string>
	Definition: must be "qcom,cpu-clock-osm-msm8998-v1" or
		    "qcom,cpu-clock-osm-msm8998-v2".
	Definition: must be "qcom,cpu-clock-osm-msm8998-v1",
		    "qcom,cpu-clock-osm-msm8998-v2" or
		    "qcom,clk-cpu-osm".

- reg
	Usage:      required
+1 −1
Original line number Diff line number Diff line
@@ -15,7 +15,7 @@ Required properties:
			"qcom,mdss_hdmi_pll_8996_v2", "qcom,mdss_dsi_pll_8996_v2",
			"qcom,mdss_hdmi_pll_8996_v3", "qcom,mdss_hdmi_pll_8996_v3_1p8",
			"qcom,mdss_dsi_pll_8998", "qcom,mdss_dp_pll_8998",
			"qcom,mdss_hdmi_pll_8998"
			"qcom,mdss_hdmi_pll_8998", "qcom,mdss_dsi_pll_msmfalcon"
- cell-index:		Specifies the controller used
- reg:			offset and length of the register set for the device.
- reg-names :		names to refer to register sets related to this device
+6 −0
Original line number Diff line number Diff line
@@ -143,6 +143,12 @@ Optional Properties:
				Specify the name of GPU temperature sensor. This name will be used
				to get the temperature from the thermal driver API.

- qcom,enable-midframe-timer:
				Boolean. Enables the use of midframe sampling timer. This timer
				samples the GPU powerstats if the cmdbatch expiry takes longer than
				the threshold set by KGSL_GOVERNOR_CALL_INTERVAL. Enable only if
				target has NAP state enabled.

GPU Quirks:
- qcom,gpu-quirk-two-pass-use-wfi:
				Signal the GPU to set Set TWOPASSUSEWFI bit in
+321 −0
Original line number Diff line number Diff line
Qualcomm Technologies, Inc. CPR4 Regulator - MMSS LDO Specific Bindings

MMSS LDO CPR4 controllers each support one CPR thread that monitors the voltage
of the graphics processor (MMSS) supply regulator.  The CPR open-loop voltages
are stored in hardware fuses for MMSS CPR4 controllers.  However, the CPR target
quotients must be defined in device tree.

This document describes the MMSS LDO specific CPR4 bindings.

=======================
Required Node Structure
=======================

CPR3 regulators must be described in three levels of devices nodes.  The first
level describes the CPR3 controller.  The second level describes exacly one
hardware thread managed by the controller.  The third level describes one or
more logical regulators handled by the CPR thread.

All platform independent cpr3-regulator binding guidelines defined in
cpr3-regulator.txt also apply to cpr4-mmss-ldo-regulator devices.

====================================
First Level Nodes - CPR3 Controllers
====================================

MMSS LDO specific properties:
- compatible
	Usage:      required
	Value type: <string>
	Definition: should be the following:
		    "qcom,cpr4-msmfalcon-mmss-ldo-regulator".

- clocks
	Usage:      required
	Value type: <prop-encoded-array>
	Definition: Array of clock tuples in which each tuple consists of a
		    phandle to a clock device and a clock ID number.  The
		    following clocks must be specified: MMSS RBCPR and MMSS
		    RBCPR AHB.

- clock-names
	Usage:      required
	Value type: <stringlist>
	Definition: Clock names.  This list must match up 1-to-1 with the clocks
		    specified in the 'clocks' property. "core_clk", and "bus_clk"
		    must be specified.

- qcom,cpr-step-quot-fixed
	Usage:      Optional
	Value type: <u32>
	Definition: Fixed step quotient value used by controller for applying
		    the SDELTA margin adjustments on the programmed target
		    quotient values. The step quotient is the number of
		    additional ring oscillator ticks observed for each
		    qcom,voltage-step increase in vdd-supply output voltage.
		    Supported values: 0 - 63.

=================================================
Second Level Nodes - CPR Threads for a Controller
=================================================

MMSS specific properties:
N/A

===============================================
Third Level Nodes - CPR Regulators for a Thread
===============================================

MMSS specific properties:
- qcom,cpr-fuse-corners
	Usage:      required
	Value type: <u32>
	Definition: Specifies the number of fuse corners. This value must be 6
		    for msmfalcon GFX LDO. These fuse corners are: MinSVS,
		    LowSVS, SVS, SVSP, NOM and NOMP. The open-loop voltage fuses
		    are allocated for LowSVS, SVS, NOM and NOMP corners. The
		    open-loop voltages for MinSVS and SVSP are derived by
		    applying fixed offset from LowSVS and NOM open-loop voltages
		    respectively. The closed-loop offset voltage fuses are
		    allocated for LowSVS, SVS, NOM and NOMP corners. The MinSVS
		    and SVSP corners use the closed-loop offset voltage fuses of
		    LowSVS and NOM corners respectively.

- qcom,cpr-fuse-combos
	Usage:      required
	Value type: <u32>
	Definition: Specifies the number of fuse combinations being supported by
		    the device.  This value is utilized by several other
		    properties.  Supported values are 1 up to the maximum
		    possible for a given regulator type.  For MMSS the maximum
		    supported value is 8.  These combos correspond to CPR
		    revision fuse values from 0 to 7 in order.

- qcom,mem-acc-voltage
	Usage:      required if mem-acc-supply is specified for the CPR3 controller
		    containing this CPR3 regulator
	Value type: <prop-encoded-array>
	Definition: A list of integer tuples which each define the mem-acc-supply
		    corner for each voltage corner in order from lowest to highest.

		    The list must contain qcom,cpr-fuse-combos number of tuples
		    in which case the tuples are matched to fuse combinations
		    1-to-1 or qcom,cpr-speed-bins number of tuples in which case
		    the tuples are matched to speed bins 1-to-1 or exactly 1
		    tuple which is used regardless of the fuse combination and
		    speed bin found on a given chip.

		    Each tuple must be of the length defined in the
		    corresponding element of the qcom,cpr-corners property or
		    the qcom,cpr-speed-bins property.  A single tuple may only
		    be specified if all of the corner counts in qcom,cpr-corners
		    are the same.

- qcom,cpr-target-quotients
	Usage:      required
	Value type: <prop-encoded-array>
	Definition: A grouping of integer tuple lists.  Each tuple defines the
		    CPR target quotient for each ring oscillator (RO) for a
		    given corner.  Since CPR3 supports exactly 16 ROs, each
		    tuple must contain 16 elements corresponding to RO0 through
		    RO15 in order.  If a given RO is unused for a corner, then
		    its target quotient should be specified as 0.

		    Each tuple list in the grouping must meet the same size
		    requirements as those specified for qcom,mem-acc-voltage
		    above. The tuples in a given list are ordered from the
		    lowest corner to the highest corner.

- qcom,cpr-ro-scaling-factor
	Usage:      required if qcom,cpr-closed-loop-voltage-adjustment is
		    specified
	Value type: <prop-encoded-array>
	Definition: The common definition of this property in cpr3-regulator.txt
		    is accurate for MMSS CPR3 controllers except for this
		    modification:

		    Each tuple list must contain the number of tuples defined in
		    the corresponding element of the qcom,cpr-corners property
		    or the qcom,cpr-speed-bins property as opposed to the value
		    of the qcom,cpr-fuse-corners property.

- qcom,cpr-fused-closed-loop-voltage-adjustment-map
	Usage:      optional
	Value type: <prop-encoded-array>
	Definition: A list of integer tuples which each define the CPR fused
		    corner closed-loop offset adjustment fuse to utilize for
		    each voltage corner in order from lowest to highest.

		    The list must contain qcom,cpr-fuse-combos number of tuples
		    in which case the tuples are matched to fuse combinations
		    1-to-1 or qcom,cpr-speed-bins number of tuples in which case
		    the tuples are matched to speed bins 1-to-1 or exactly 1
		    tuple which is used regardless of the fuse combination and
		    speed bin found on a given chip.

		    Each tuple must be of the length defined in the
		    corresponding element of the qcom,cpr-corners property or
		    the qcom,cpr-speed-bins property.  A single tuple may only
		    be specified if all of the corner counts in qcom,cpr-corners
		    are the same.

		    Each tuple element must be either 0 or in the range 1 to
		    qcom,cpr-fuse-corners.  A value of 0 signifies that no fuse
		    based adjustment should be applied to the fuse corner.
		    Values 1 to qcom,cpr-fuse-corners denote the specific fuse
		    corner that should be used by a given voltage corner.

- qcom,cpr-corner-allow-ldo-mode
	Usage:      optional
	Value type: <prop-encoded-array>
	Definition: A list of integer tuples which each define the LDO mode
		    allowed state for each voltage corner in order from lowest
		    to highest. Each element in the tuple should be either
		    0 (LDO mode not allowed) or 1 (LDO mode allowed).

		    The list must contain qcom,cpr-fuse-combos number of tuples
		    in which case the tuples are matched to fuse combinations
		    1-to-1 or qcom,cpr-speed-bins number of tuples in which case
		    the tuples are matched to speed bins 1-to-1 or exactly 1
		    tuple which is used regardless of the fuse combination and
		    speed bin found on a given chip.

		    Each tuple must be of the length defined in the
		    corresponding element of the qcom,cpr-corners property or
		    the qcom,cpr-speed-bin-corners property.  A single tuple may
		    only be specified if all of the corner counts in
		    qcom,cpr-corners are the same.

- qcom,cpr-corner-allow-closed-loop
	Usage:      optional
	Value type: <prop-encoded-array>
	Definition: A list of integer tuples which each define the CPR
		    closed-loop operation allowed state for each voltage corner
		    in order from lowest to highest. Each element in the tuple
		    should be either 0 (CPR closed-loop operation not allowed)
		    or 1 (CPR closed-loop operation allowed).

		    The list must contain qcom,cpr-fuse-combos number of tuples
		    in which case the tuples are matched to fuse combinations
		    1-to-1 or qcom,cpr-speed-bins number of tuples in which case
		    the tuples are matched to speed bins 1-to-1 or exactly 1
		    tuple which is used regardless of the fuse combination and
		    speed bin found on a given chip.

		    Each tuple must be of the length defined in the
		    corresponding element of the qcom,cpr-corners property or
		    the qcom,cpr-speed-bin-corners property.  A single tuple may
		    only be specified if all of the corner counts in
		    qcom,cpr-corners are the same.

Note that the qcom,cpr-closed-loop-voltage-fuse-adjustment property is not
meaningful for MMSS LDO CPR3 regulator nodes since target quotients are not
defined in fuses.

=======
Example
=======

gfx_cpr: cpr4-ctrl@05061000 {
	compatible = "qcom,cpr4-msmfalcon-mmss-ldo-regulator";
	reg = <0x05061000 0x4000>, <0x00784000 0x1000>;
	reg-names = "cpr_ctrl", "fuse_base";
	interrupts = <GIC_SPI 285 IRQ_TYPE_EDGE_RISING>;
	interrupt-names = "cpr";
	qcom,cpr-ctrl-name = "gfx";

	qcom,cpr-sensor-time = <1000>;
	qcom,cpr-loop-time = <5000000>;
	qcom,cpr-idle-cycles = <15>;
	qcom,cpr-step-quot-init-min = <8>;
	qcom,cpr-step-quot-init-max = <12>;
	qcom,cpr-count-mode = <0>;		/* All at once */

	vdd-supply = <&gfx_stub_vreg>;
	mem-acc-supply = <&gfx_mem_acc_vreg>;
	system-supply = <&pm2falcon_s3_level>; /* vdd_cx */
	qcom,voltage-step = <5000>;
	vdd-thread0-ldo-supply = <&gfx_ldo_vreg>;

	qcom,cpr-enable;

	thread@0 {
		qcom,cpr-thread-id = <0>;
		qcom,cpr-consecutive-up = <0>;
		qcom,cpr-consecutive-down = <2>;
		qcom,cpr-up-threshold = <0>;
		qcom,cpr-down-threshold = <2>;

		gfx_vreg_corner: regulator {
			regulator-name = "gfx_corner";
			regulator-min-microvolt = <1>;
			regulator-max-microvolt = <7>;

			qcom,cpr-fuse-corners = <6>;
			qcom,cpr-fuse-combos = <8>;
			qcom,cpr-corners = <7>;

			qcom,cpr-corner-fmax-map = <1 2 3 4 5 6>;

			qcom,cpr-voltage-ceiling =
				<584000  644000  724000  788000
				 868000  924000 1068000>;
			qcom,cpr-voltage-floor =
				<504000  504000  596000  652000
				 712000  744000 1068000>;

			qcom,mem-acc-voltage = <1 1 1 2 2 2 2>;
			qcom,system-voltage =
				<RPM_SMD_REGULATOR_LEVEL_MIN_SVS>,
				<RPM_SMD_REGULATOR_LEVEL_LOW_SVS>,
				<RPM_SMD_REGULATOR_LEVEL_SVS>,
				<RPM_SMD_REGULATOR_LEVEL_SVS_PLUS>,
				<RPM_SMD_REGULATOR_LEVEL_NOM>,
				<RPM_SMD_REGULATOR_LEVEL_NOM_PLUS>,
				<RPM_SMD_REGULATOR_LEVEL_TURBO>;

			qcom,corner-frequencies =
				<160000000 266000000 370000000
				 465000000 588000000 647000000
				 800000000>;

			qcom,cpr-target-quotients =
				<0    0    0    0     0    0  185  179
				291  299  304  319    0    0    0    0>,
				<0    0    0    0     0    0  287  273
				425  426  443  453    0    0    0    0>,
				<0    0    0    0     0    0  414  392
				584  576  608  612    0    0    0    0>,
				<0    0    0    0     0    0  459  431
				684  644  692  679    0    0    0    0>,
				<0    0    0    0     0    0  577  543
				798  768  823  810    0    0    0    0>,
				<0    0    0    0     0    0  669  629
				886  864  924  911    0    0    0    0>,
				<0    0    0    0     0    0    0    0
				 0    0    0    0     0    0    0    0>;

			qcom,cpr-ro-scaling-factor =
				<  0    0    0    0   0    0 2035 1917
				1959 2131 2246 2253   0    0    0    0>,
				<  0    0    0    0   0    0 2035 1917
				1959 2131 2246 2253   0    0    0    0>,
				<  0    0    0    0   0    0 2035 1917
				1959 2131 2246 2253   0    0    0    0>,
				<  0    0    0    0   0    0 2035 1917
				1959 2131 2246 2253   0    0    0    0>,
				<  0    0    0    0   0    0 2035 1917
				1959 2131 2246 2253   0    0    0    0>,
				<  0    0    0    0   0    0 2035 1917
				1959 2131 2246 2253   0    0    0    0>,
				<  0    0    0    0   0    0    0    0
				   0    0    0    0   0    0    0    0>;

			qcom,cpr-scaled-open-loop-voltage-as-ceiling;
			qcom,cpr-corner-ldo-mode-allowed =
				<1 1 1 1 1 1 0>;
			qcom,cpr-corner-use-closed-loop =
				<1 1 1 1 1 1 0>;
		};
	};
};
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