ASoC: davinci-mcasp: Set rule constraints if implicit BCLK divider is used

Set rule constraints to allow only combinations of sample-rate,
sample-format, and channels counts that can be played/captured with
reasonable sample-rate accuracy.

The logic with tdm-slots and serializers (=i2s data wires) goes like
this: The first wire will take all channels up to number of tdm-slots,
before following wires (if any) are used. If the first wire is used
fully, the remaining wires share the same clocks and the divider can
be calculated for the first wire.

Also, takes the number of tdm-slots into account when implicitly
selecting the BLCK divider.

Signed-off-by: Jyri Sarha <jsarha@ti.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@kernel.org>