clk: msm: osm: add workaround for C2D/C3 + D2D collapse issue

Program architectural register 6 with the address of the SPM
core count hysteresis register and architectural register 7
with the up and down core-count SPM hysteresis values. The
sequencer uses this information to ensure stable operation
when CPU retention or power-collapse and cluster collapse
LPMs are enabled.

CRs-Fixed: 1045435
Change-Id: I5e41ce376c694736128ceb051db86f93467fdaea
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>