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Commit 6d8759f6 authored by Linux Build Service Account's avatar Linux Build Service Account
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Promotion of kernel.lnx.4.4-161019. 

CRs      Change ID                                   Subject
--------------------------------------------------------------------------------------------------------------
1064870   I151bc5d373129e3599baf6d3217b65843c0f16d0   ASoC: wcd-spi: Add memory read debug support
1075775   I804ec7556cbd18ff2d9869a03069fda1dd519a79   soc: qcom: Add better support for early random numbers
1078380   I115524d562b63a8ec76b327207919b6ac9327fe2   msm: ipa3: Do not wait for IPA DMA_TASK H/W ACK for GSI
1078894   I2bc1eb26bcc7ed4aaa381417045d08b6779679ee   driver: msm_lmh_dcvs: Input correct dmac flush range arg
1078316   Ib3d13360def3ab47f121c66057c96977f5264043   icnss: Fix return value for register_driver
1070261   I6be84411e0bfe4f90570ab62c2d0a0c8539b8f34   msm: ipa: fix reference count in rm
1075775   If40cfcb96b091fa26a28047c10a902287b26f6c1   msm: implement ARCH_RANDOM
1076446   Ie254b8876524956b816267eaaed205f65641c000   ASoC: wcd9335: Fix race during codec master clock (mclk)
1071309   I1f8d596e6c930f3f6f00e24109ddbe8b121f8d6b   sched: Enhance the scheduler migration load fixup featur
1079673   I46b5da53614bdac740a1c85b0b3072cae32d20f7   ARM: dts: msm: Add support for CDSP PIL on msmfalcon
1072672   Ia4893c31eefcb5ac23440c67669af936620b31c1   input: misc: pat9125: add regulator framework support
1078894   If6db015558a6a9e3db53ba7f1455808e779da908   driver: bcl_peripheral: Input correct dmac flush range a
1071309   Ib584372eb539706da4319973314e54dae04e5934   sched: Add per CPU load tracking for each task
1073937   I2814cf7191c4410ca7d869b033fc68981dc4de70   ARM: dts: msm: Move 720p120fps encode to SVS on msmcobal
1066261   I58c13a97dd35b3a439ea1af25bc93182e38e29f0   msm: camera: isp: Configure stats framedrop period corre
1076441   Ia893786de4689e07f8d99d1ba3d8f1d6efcc7686   icnss: Switch to CXO before XO disable
1075775   I00b564a2c3172229a44339c061fa380c17fe7d8e   init: Move stack canary initialization after setup_arch
1078743   I61b308dce7e92b0e28033750885eac4a003dc01a   Revert "soc: qcom: Listen to SUBSYS_AFTER_SHUTDOWN notif
1078307   I27ec29c3a6c5f3aac31705e60e1b8cf3270322a1   smb-lib: qpnp-smb2: cleanup parallel charging code
1078894   Ib0e9690fc158a76dcebbd5ae45f67aaeca016a48   driver: msm_thermal: Input correct dmac flush range argu
1075775   Ia848af5bafe2337718fffdd87cd6436eb0133ece   qcom: Update early random APIs to scmv8
1071309   Ie585a11ed774b929910d04c41471db3a2a102ec5   sched: Add multiple load reporting policies for cpu freq
1072739   Ifc6102d367fb0ca9fffbd50a6077dccd779e9a6c   serial: msm_serial_hs: Move HS UART pins to known state
1072607   I622533807c7e4653a7aa3c51bf4e4f0db1a7a5ff   ARM: dts: msm: Enable RPM clock support for MSMfalcon/Tr
1075775   I01dc0cc0d0fc734dbf1166d88d97bcc5102788bb   defconfig: msmcortex: Enable early random driver
1070087   I271cf0ad12652421ab3ae8770714ccb78c043efa   ASoC: wcd-spi: fix the maximum transfer unit setting
1074535   Ie153ae9cc00a72287b10623d63f29c08a1154cb9   usb: gadget: f_qc_rndis: Change function name from qcrnd
1078894   Iefcf85eaa5ea5542888269b7506b8f6e0e861243   driver: lmh_lite: Input correct dmac flush range argumen
1071309   I004dba474f41590db7d3f40d9deafe86e71359ac   sched: Add the mechanics of top task tracking for freque
1071309   Ibafaf66eed756b0328704dfaa89c17ab0d84e359   sched: Optimize the next top task search logic upon task
1067296   Ibdec14a3e835df19876658d0ad7600da0200603b   ARM: dts: msm: add the cma region for venus on msmtriton
1079183   I4bdced9942e6524e8cc21410532fa7231049454f   media: dvb-core: dvb dmxdev filter callback function cha
1073679   I786d0774589ae64b298754286be28d67d394a66d   qpnp-smb2: handle DC insertion

Change-Id: If45ad0023b573e868316e64a6d14b465addc51d6
CRs-Fixed: 1071309, 1064870, 1078894, 1078316, 1067296, 1076446, 1066261, 1072607, 1070261, 1070087, 1079673, 1072672, 1073679, 1074535, 1079183, 1076441, 1078307, 1078743, 1078380, 1072739, 1073937, 1075775
parents c7282bc2 fb1e5793

Documentation/devicetree/bindings/input/pixart-pat9125-switch.txt

+4 −0
Original line number Diff line number Diff line
@@ -10,6 +10,8 @@ Required properties: 
 - reg	: i2c slave address of the device.

 - interrupt-parent	: parent of interrupt.

 - interrupts	: interrupt to indicate motion of the rotating switch.

 - vdd-supply	: Power supply needed to power up the device.

 - vld-supply	: Power source required to power up I2C bus.



Optional properties:

 - pixart,inverse-x 	: boolean, use this to invert the x data before sending it to input framework
@@ -44,6 +46,8 @@ Example: 
		reg = <0x75>;

		interrupt-parent = <&msm_gpio>;

		interrupts = <98 0x2008>;

		vdd-supply = <&pm8110_l5>;

		vld-supply = <&pm8110_l17>;

		pixart,irq-gpio = <&msm_gpio 98 0x2008>;

		pinctrl-names = "pmx_rot_switch_active",

				"pmx_rot_switch_suspend",

arch/arm/boot/dts/qcom/msmcobalt-v2.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -672,8 +672,8 @@ 
		<1036800 444000000 0x55555555>, /* 720p@240, 1080p@120,1440p@60,

						 * UHD@30 */ /*NOMINAL*/

		< 829440 355200000 0x55555555>, /* UHD/4096x2160@30 SVSL1 */

		< 489600 269330000 0x55555555>, /* 1080p@60 SVS */

		< 432000 200000000 0x55555555>, /* 720p@120, 1080p@30 */

		< 489600 269330000 0x55555555>, /* 1080p@60, 720p@120 SVS */

		< 345600 200000000 0x55555555>, /* 2560x1440@24, 1080p@30 */

						/* SVS2 */



		/* Decoders */

arch/arm/boot/dts/qcom/msmfalcon-smp2p.dtsi

+23 −0
Original line number Diff line number Diff line
@@ -195,4 +195,27 @@ 
		interrupt-controller;

		#interrupt-cells = <2>;

	};



	/* ssr - inbound entry from turing */

	smp2pgpio_ssr_smp2p_5_in: qcom,smp2pgpio-ssr-smp2p-5-in {

		compatible = "qcom,smp2pgpio";

		qcom,entry-name = "slave-kernel";

		qcom,remote-pid = <5>;

		qcom,is-inbound;

		gpio-controller;

		#gpio-cells = <2>;

		interrupt-controller;

		#interrupt-cells = <2>;

	};



	/* ssr - outbound entry to turing */

	smp2pgpio_ssr_smp2p_5_out: qcom,smp2pgpio-ssr-smp2p-5-out {

		compatible = "qcom,smp2pgpio";

		qcom,entry-name = "master-kernel";

		qcom,remote-pid = <5>;

		gpio-controller;

		#gpio-cells = <2>;

		interrupt-controller;

		#interrupt-cells = <2>;

	};

};

arch/arm/boot/dts/qcom/msmfalcon.dtsi

+34 −3
Original line number Diff line number Diff line
@@ -377,9 +377,8 @@ 
		};

	};



	clock_rpmcc: qcom,dummycc {

		compatible = "qcom,dummycc";

		clock-output-names = "rpmcc_clocks";

	clock_rpmcc: qcom,rpmcc {

		compatible = "qcom,rpmcc-msmfalcon", "qcom,rpmcc";

		#clock-cells = <1>;

	};
@@ -702,6 +701,38 @@ 
		qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_2_out 0 0>;

		status = "ok";

	};



	qcom,turing@1a300000 {

		compatible = "qcom,pil-tz-generic";

		reg = <0x1a300000 0x00100>;

		interrupts = <0 518 1>;



		vdd_cx-supply = <&pmfalcon_s3b_level>;

		qcom,proxy-reg-names = "vdd_cx";

		qcom,vdd_cx-uV-uA = <RPM_SMD_REGULATOR_LEVEL_TURBO 100000>;



		clocks = <&clock_rpmcc CXO_PIL_CDSP_CLK>;

		clock-names = "xo";

		qcom,proxy-clock-names = "xo";



		qcom,pas-id = <18>;

		qcom,proxy-timeout-ms = <10000>;

		qcom,smem-id = <423>;

		qcom,sysmon-id = <7>;

		qcom,ssctl-instance-id = <0x17>;

		qcom,firmware-name = "cdsp";

		memory-region = <&cdsp_fw_mem>;



		/* GPIO inputs from turing */

		qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_5_in 0 0>;

		qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_5_in 2 0>;

		qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_5_in 1 0>;

		qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_5_in 3 0>;



		/* GPIO output to turing*/

		qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_5_out 0 0>;

		status = "ok";

	};

};



#include "msmfalcon-ion.dtsi"

arch/arm/boot/dts/qcom/msmtriton.dtsi

+10 −3
Original line number Diff line number Diff line
@@ -177,6 +177,14 @@ 
			reg = <0x0 0x92a00000 0x0 0x1e00000>;

		};



		venus_fw_mem: venus_fw_region {

			compatible = "shared-dma-pool";

			alloc-ranges = <0x0 0x80000000 0x0 0x20000000>;

			reusable;

			alignment = <0x0 0x400000>;

			size = <0x0 0x800000>;

		};



		adsp_mem: adsp_region {

			compatible = "shared-dma-pool";

			alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;
@@ -326,9 +334,8 @@ 
		};

	};



	clock_rpmcc: qcom,dummycc {

		compatible = "qcom,dummycc";

		clock-output-names = "rpmcc_clocks";

	clock_rpmcc: qcom,rpmcc {

		compatible = "qcom,rpmcc-msmfalcon", "qcom,rpmcc";

		#clock-cells = <1>;

	};