Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 5fa9ed46 authored by Deepak Katragadda's avatar Deepak Katragadda
Browse files

clk: msm: clock-debug: Print VDD level in clock_state traces



Add support for printing the voltage voting info to the
clock_state ftrace events.

CRs-Fixed: 1082843
Change-Id: I6ab3992958a659995b7d5020287fd6e47e28f2a4
Signed-off-by: default avatarDeepak Katragadda <dkatraga@codeaurora.org>
parent 9a5e4de1
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please register or to comment