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Commit 538198f2 authored by Girish Mahadevan's avatar Girish Mahadevan Committed by Kyle Yan
Browse files

ARM: dts: msm: Correct the TLMM IRQs for UART instances 



The TLMM IRQ numbers were set incorrectly. This can prevent the UART
peer devices from waking up the core from sleep.

Change-Id: I11e725ac31f78f838ac9b8e1e08c384d11ea14a6
Signed-off-by: default avatarGirish Mahadevan <girishm@codeaurora.org>
parent 6e4ffe07

arch/arm/boot/dts/qcom/msmcobalt-blsp.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -687,7 +687,7 @@ 
		interrupt-map-mask = <0xffffffff>;

		interrupt-map = <0 &intc 0 0 108 0

			    1 &intc 0 0 238 0

			    2 &tlmm 5 0>;

			    2 &tlmm 34 0>;



		qcom,inject-rx-on-wakeup;

		qcom,rx-char-to-inject = <0xFD>;
@@ -724,7 +724,7 @@ 
		interrupt-map-mask = <0xffffffff>;

		interrupt-map = <0 &intc 0 0 109 0

			    1 &intc 0 0 238 0

			    2 &tlmm 9 0>;

			    2 &tlmm 46 0>;



		qcom,inject-rx-on-wakeup;

		qcom,rx-char-to-inject = <0xFD>;
@@ -761,7 +761,7 @@ 
		interrupt-map-mask = <0xffffffff>;

		interrupt-map = <0 &intc 0 0 113 0

			    1 &intc 0 0 239 0

			    2 &tlmm 1 0>;

			    2 &tlmm 54 0>;



		qcom,inject-rx-on-wakeup;

		qcom,rx-char-to-inject = <0xFD>;
@@ -835,7 +835,7 @@ 
		interrupt-map-mask = <0xffffffff>;

		interrupt-map = <0 &intc 0 0 115 0

			    1 &intc 0 0 239 0

			    2 &tlmm 9 0>;

			    2 &tlmm 50 0>;



		qcom,inject-rx-on-wakeup;

		qcom,rx-char-to-inject = <0xFD>;