+1
−0
drivers/clk/msm/reset.c
0 → 100644
+94
−0
drivers/clk/msm/reset.h
0 → 100644
+39
−0
Loading
Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more
A reset signal is associated with each clock branch but sometimes a reset
signal is associated with a handful of clocks. Either way the register
interface is the same; set a bit to assert a reset and clear a bit to
deassert a reset. Add support for these types of resets signals.
Change-Id: Ic9d00c0a03507a55ca6c96f977a6ddf55b4b5db7
Signed-off-by:
Taniya Das <tdas@codeaurora.org>