Loading drivers/power/supply/qcom/qpnp-fg-gen3.c +34 −21 Original line number Diff line number Diff line Loading @@ -2189,6 +2189,35 @@ static int fg_get_cycle_count(struct fg_chip *chip) return count; } static int fg_bp_params_config(struct fg_chip *chip) { int rc = 0; u8 buf; /* This SRAM register is only present in v2.0 and above */ if (!(chip->wa_flags & PMI8998_V1_REV_WA) && chip->bp.float_volt_uv > 0) { fg_encode(chip->sp, FG_SRAM_FLOAT_VOLT, chip->bp.float_volt_uv / 1000, &buf); rc = fg_sram_write(chip, chip->sp[FG_SRAM_FLOAT_VOLT].addr_word, chip->sp[FG_SRAM_FLOAT_VOLT].addr_byte, &buf, chip->sp[FG_SRAM_FLOAT_VOLT].len, FG_IMA_DEFAULT); if (rc < 0) { pr_err("Error in writing float_volt, rc=%d\n", rc); return rc; } } if (chip->bp.vbatt_full_mv > 0) { rc = fg_set_constant_chg_voltage(chip, chip->bp.vbatt_full_mv * 1000); if (rc < 0) return rc; } return rc; } #define PROFILE_LOAD_BIT BIT(0) #define BOOTLOADER_LOAD_BIT BIT(1) #define BOOTLOADER_RESTART_BIT BIT(2) Loading Loading @@ -2367,6 +2396,11 @@ static void profile_load_work(struct work_struct *work) } done: rc = fg_bp_params_config(chip); if (rc < 0) pr_err("Error in configuring battery profile params, rc:%d\n", rc); rc = fg_sram_read(chip, NOM_CAP_WORD, NOM_CAP_OFFSET, buf, 2, FG_IMA_DEFAULT); if (rc < 0) { Loading Loading @@ -3018,27 +3052,6 @@ static int fg_hw_init(struct fg_chip *chip) return rc; } /* This SRAM register is only present in v2.0 and above */ if (!(chip->wa_flags & PMI8998_V1_REV_WA) && chip->bp.float_volt_uv > 0) { fg_encode(chip->sp, FG_SRAM_FLOAT_VOLT, chip->bp.float_volt_uv / 1000, buf); rc = fg_sram_write(chip, chip->sp[FG_SRAM_FLOAT_VOLT].addr_word, chip->sp[FG_SRAM_FLOAT_VOLT].addr_byte, buf, chip->sp[FG_SRAM_FLOAT_VOLT].len, FG_IMA_DEFAULT); if (rc < 0) { pr_err("Error in writing float_volt, rc=%d\n", rc); return rc; } } if (chip->bp.vbatt_full_mv > 0) { rc = fg_set_constant_chg_voltage(chip, chip->bp.vbatt_full_mv * 1000); if (rc < 0) return rc; } fg_encode(chip->sp, FG_SRAM_CHG_TERM_CURR, chip->dt.chg_term_curr_ma, buf); rc = fg_sram_write(chip, chip->sp[FG_SRAM_CHG_TERM_CURR].addr_word, Loading Loading
drivers/power/supply/qcom/qpnp-fg-gen3.c +34 −21 Original line number Diff line number Diff line Loading @@ -2189,6 +2189,35 @@ static int fg_get_cycle_count(struct fg_chip *chip) return count; } static int fg_bp_params_config(struct fg_chip *chip) { int rc = 0; u8 buf; /* This SRAM register is only present in v2.0 and above */ if (!(chip->wa_flags & PMI8998_V1_REV_WA) && chip->bp.float_volt_uv > 0) { fg_encode(chip->sp, FG_SRAM_FLOAT_VOLT, chip->bp.float_volt_uv / 1000, &buf); rc = fg_sram_write(chip, chip->sp[FG_SRAM_FLOAT_VOLT].addr_word, chip->sp[FG_SRAM_FLOAT_VOLT].addr_byte, &buf, chip->sp[FG_SRAM_FLOAT_VOLT].len, FG_IMA_DEFAULT); if (rc < 0) { pr_err("Error in writing float_volt, rc=%d\n", rc); return rc; } } if (chip->bp.vbatt_full_mv > 0) { rc = fg_set_constant_chg_voltage(chip, chip->bp.vbatt_full_mv * 1000); if (rc < 0) return rc; } return rc; } #define PROFILE_LOAD_BIT BIT(0) #define BOOTLOADER_LOAD_BIT BIT(1) #define BOOTLOADER_RESTART_BIT BIT(2) Loading Loading @@ -2367,6 +2396,11 @@ static void profile_load_work(struct work_struct *work) } done: rc = fg_bp_params_config(chip); if (rc < 0) pr_err("Error in configuring battery profile params, rc:%d\n", rc); rc = fg_sram_read(chip, NOM_CAP_WORD, NOM_CAP_OFFSET, buf, 2, FG_IMA_DEFAULT); if (rc < 0) { Loading Loading @@ -3018,27 +3052,6 @@ static int fg_hw_init(struct fg_chip *chip) return rc; } /* This SRAM register is only present in v2.0 and above */ if (!(chip->wa_flags & PMI8998_V1_REV_WA) && chip->bp.float_volt_uv > 0) { fg_encode(chip->sp, FG_SRAM_FLOAT_VOLT, chip->bp.float_volt_uv / 1000, buf); rc = fg_sram_write(chip, chip->sp[FG_SRAM_FLOAT_VOLT].addr_word, chip->sp[FG_SRAM_FLOAT_VOLT].addr_byte, buf, chip->sp[FG_SRAM_FLOAT_VOLT].len, FG_IMA_DEFAULT); if (rc < 0) { pr_err("Error in writing float_volt, rc=%d\n", rc); return rc; } } if (chip->bp.vbatt_full_mv > 0) { rc = fg_set_constant_chg_voltage(chip, chip->bp.vbatt_full_mv * 1000); if (rc < 0) return rc; } fg_encode(chip->sp, FG_SRAM_CHG_TERM_CURR, chip->dt.chg_term_curr_ma, buf); rc = fg_sram_write(chip, chip->sp[FG_SRAM_CHG_TERM_CURR].addr_word, Loading