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Commit 3f3ebfb8 authored by Stefan Agner's avatar Stefan Agner Committed by Shawn Guo
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ARM: dts: vf610: assign oscillator to clock module



The clock controller module (CCM) has several clock inputs, which
are connected to external crystal oscillators. To reflect this,
assign these fixed clocks to the CCM node directly.

This especially resolves initialization order dependencies we had
with the earlier initialization code: When resolving of the fixed
clocks failed in clk-vf610, the code created fixed clocks with a
rate of 0.

Signed-off-by: default avatarStefan Agner <stefan@agner.ch>
Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
parent 7e41a98d
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+15 −0
Original line number Diff line number Diff line
@@ -5,6 +5,19 @@ Required properties:
- reg: Address and length of the register set
- #clock-cells: Should be <1>

Optional properties:
- clocks: list of clock identifiers which are external input clocks to the
	given clock controller. Please refer the next section to find
	the input clocks for a given controller.
- clock-names: list of names of clocks which are exteral input clocks to the
	given clock controller.

Input clocks for top clock controller:
	- sxosc (external crystal oscillator 32KHz, recommended)
	- fxosc (external crystal oscillator 24MHz, recommended)
	- audio_ext
	- enet_ext

The clock consumer should specify the desired clock by having the clock
ID in its "clocks" phandle cell. See include/dt-bindings/clock/vf610-clock.h
for the full list of VF610 clock IDs.
@@ -15,6 +28,8 @@ clks: ccm@4006b000 {
	compatible = "fsl,vf610-ccm";
	reg = <0x4006b000 0x1000>;
	#clock-cells = <1>;
	clocks = <&sxosc>, <&fxosc>;
	clock-names = "sxosc", "fxosc";
};

uart1: serial@40028000 {
+8 −6
Original line number Diff line number Diff line
@@ -23,14 +23,16 @@
		reg = <0x80000000 0x10000000>;
	};

	clocks {
		enet_ext {
	enet_ext: enet_ext {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <50000000>;
	};
};

&clks {
	clocks = <&sxosc>, <&fxosc>, <&enet_ext>;
	clock-names = "sxosc", "fxosc", "enet_ext";
};

&fec1 {
+14 −11
Original line number Diff line number Diff line
@@ -22,19 +22,17 @@
		reg = <0x80000000 0x8000000>;
	};

	clocks {
		audio_ext {
	audio_ext: mclk_osc {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <24576000>;
	};

		enet_ext {
	enet_ext: eth_osc {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <50000000>;
	};
	};

	regulators {
		compatible = "simple-bus";
@@ -95,6 +93,11 @@
	status = "okay";
};

&clks {
	clocks = <&sxosc>, <&fxosc>, <&enet_ext>, <&audio_ext>;
	clock-names = "sxosc", "fxosc", "enet_ext", "audio_ext";
};

&dspi0 {
	bus-num = <0>;
	pinctrl-names = "default";
+11 −14
Original line number Diff line number Diff line
@@ -44,21 +44,16 @@
		};
	};

	clocks {
		#address-cells = <1>;
		#size-cells = <0>;

		sxosc {
	fxosc: fxosc {
		compatible = "fixed-clock";
		#clock-cells = <0>;
			clock-frequency = <32768>;
		clock-frequency = <24000000>;
	};

		fxosc {
	sxosc: sxosc {
		compatible = "fixed-clock";
		#clock-cells = <0>;
			clock-frequency = <24000000>;
		};
		clock-frequency = <32768>;
	};

	soc {
@@ -358,6 +353,8 @@
			clks: ccm@4006b000 {
				compatible = "fsl,vf610-ccm";
				reg = <0x4006b000 0x1000>;
				clocks = <&sxosc>, <&fxosc>;
				clock-names = "sxosc", "fxosc";
				#clock-cells = <1>;
			};