Loading drivers/video/fbdev/msm/mdss_dp.c +34 −3 Original line number Diff line number Diff line Loading @@ -1157,23 +1157,46 @@ exit: return ret; } int mdss_dp_off(struct mdss_panel_data *pdata) static void mdss_dp_mainlink_off(struct mdss_panel_data *pdata) { struct mdss_dp_drv_pdata *dp_drv = NULL; const int idle_pattern_completion_timeout_ms = 3 * HZ / 100; dp_drv = container_of(pdata, struct mdss_dp_drv_pdata, panel_data); if (!dp_drv) { pr_err("Invalid input data\n"); return -EINVAL; return; } pr_debug("Entered++, cont_splash=%d\n", dp_drv->cont_splash); pr_debug("Entered++\n"); /* wait until link training is completed */ mutex_lock(&dp_drv->train_mutex); reinit_completion(&dp_drv->idle_comp); mdss_dp_state_ctrl(&dp_drv->ctrl_io, ST_PUSH_IDLE); if (!wait_for_completion_timeout(&dp_drv->idle_comp, idle_pattern_completion_timeout_ms)) pr_warn("PUSH_IDLE pattern timedout\n"); mutex_unlock(&dp_drv->train_mutex); pr_debug("mainlink off done\n"); } int mdss_dp_off(struct mdss_panel_data *pdata) { struct mdss_dp_drv_pdata *dp_drv = NULL; dp_drv = container_of(pdata, struct mdss_dp_drv_pdata, panel_data); if (!dp_drv) { pr_err("Invalid input data\n"); return -EINVAL; } pr_debug("Entered++, cont_splash=%d\n", dp_drv->cont_splash); /* wait until link training is completed */ mutex_lock(&dp_drv->train_mutex); if (dp_drv->link_clks_on) mdss_dp_mainlink_ctrl(&dp_drv->ctrl_io, false); Loading @@ -1187,6 +1210,13 @@ int mdss_dp_off(struct mdss_panel_data *pdata) mdss_dp_config_gpios(dp_drv, false); mdss_dp_pinctrl_set_state(dp_drv, false); /* * The global reset will need DP link ralated clocks to be * running. Add the global reset just before disabling the * link clocks and core clocks. */ mdss_dp_ctrl_reset(&dp_drv->ctrl_io); /* Make sure DP is disabled before clk disable */ wmb(); mdss_dp_clk_ctrl(dp_drv, DP_CTRL_PM, false); Loading Loading @@ -1640,6 +1670,7 @@ static int mdss_dp_event_handler(struct mdss_panel_data *pdata, case MDSS_EVENT_BLANK: if (ops && ops->off) ops->off(dp->hdcp_data); mdss_dp_mainlink_off(pdata); break; case MDSS_EVENT_FB_REGISTERED: fbi = (struct fb_info *)arg; Loading drivers/video/fbdev/msm/mdss_dp_aux.c +2 −2 Original line number Diff line number Diff line Loading @@ -1174,8 +1174,9 @@ static int dp_start_link_train_1(struct mdss_dp_drv_pdata *ep) pr_debug("Entered++"); dp_host_train_set(ep, 0x01); /* train_1 */ dp_voltage_pre_emphasise_set(ep); dp_cap_lane_rate_set(ep); dp_train_pattern_set_write(ep, 0x21); /* train_1 */ dp_voltage_pre_emphasise_set(ep); tries = 0; old_v_level = ep->v_level; Loading Loading @@ -1336,7 +1337,6 @@ int mdss_dp_link_train(struct mdss_dp_drv_pdata *dp) train_start: dp->v_level = 0; /* start from default level */ dp->p_level = 0; dp_cap_lane_rate_set(dp); mdss_dp_config_ctrl(dp); mdss_dp_state_ctrl(&dp->ctrl_io, 0); Loading Loading
drivers/video/fbdev/msm/mdss_dp.c +34 −3 Original line number Diff line number Diff line Loading @@ -1157,23 +1157,46 @@ exit: return ret; } int mdss_dp_off(struct mdss_panel_data *pdata) static void mdss_dp_mainlink_off(struct mdss_panel_data *pdata) { struct mdss_dp_drv_pdata *dp_drv = NULL; const int idle_pattern_completion_timeout_ms = 3 * HZ / 100; dp_drv = container_of(pdata, struct mdss_dp_drv_pdata, panel_data); if (!dp_drv) { pr_err("Invalid input data\n"); return -EINVAL; return; } pr_debug("Entered++, cont_splash=%d\n", dp_drv->cont_splash); pr_debug("Entered++\n"); /* wait until link training is completed */ mutex_lock(&dp_drv->train_mutex); reinit_completion(&dp_drv->idle_comp); mdss_dp_state_ctrl(&dp_drv->ctrl_io, ST_PUSH_IDLE); if (!wait_for_completion_timeout(&dp_drv->idle_comp, idle_pattern_completion_timeout_ms)) pr_warn("PUSH_IDLE pattern timedout\n"); mutex_unlock(&dp_drv->train_mutex); pr_debug("mainlink off done\n"); } int mdss_dp_off(struct mdss_panel_data *pdata) { struct mdss_dp_drv_pdata *dp_drv = NULL; dp_drv = container_of(pdata, struct mdss_dp_drv_pdata, panel_data); if (!dp_drv) { pr_err("Invalid input data\n"); return -EINVAL; } pr_debug("Entered++, cont_splash=%d\n", dp_drv->cont_splash); /* wait until link training is completed */ mutex_lock(&dp_drv->train_mutex); if (dp_drv->link_clks_on) mdss_dp_mainlink_ctrl(&dp_drv->ctrl_io, false); Loading @@ -1187,6 +1210,13 @@ int mdss_dp_off(struct mdss_panel_data *pdata) mdss_dp_config_gpios(dp_drv, false); mdss_dp_pinctrl_set_state(dp_drv, false); /* * The global reset will need DP link ralated clocks to be * running. Add the global reset just before disabling the * link clocks and core clocks. */ mdss_dp_ctrl_reset(&dp_drv->ctrl_io); /* Make sure DP is disabled before clk disable */ wmb(); mdss_dp_clk_ctrl(dp_drv, DP_CTRL_PM, false); Loading Loading @@ -1640,6 +1670,7 @@ static int mdss_dp_event_handler(struct mdss_panel_data *pdata, case MDSS_EVENT_BLANK: if (ops && ops->off) ops->off(dp->hdcp_data); mdss_dp_mainlink_off(pdata); break; case MDSS_EVENT_FB_REGISTERED: fbi = (struct fb_info *)arg; Loading
drivers/video/fbdev/msm/mdss_dp_aux.c +2 −2 Original line number Diff line number Diff line Loading @@ -1174,8 +1174,9 @@ static int dp_start_link_train_1(struct mdss_dp_drv_pdata *ep) pr_debug("Entered++"); dp_host_train_set(ep, 0x01); /* train_1 */ dp_voltage_pre_emphasise_set(ep); dp_cap_lane_rate_set(ep); dp_train_pattern_set_write(ep, 0x21); /* train_1 */ dp_voltage_pre_emphasise_set(ep); tries = 0; old_v_level = ep->v_level; Loading Loading @@ -1336,7 +1337,6 @@ int mdss_dp_link_train(struct mdss_dp_drv_pdata *dp) train_start: dp->v_level = 0; /* start from default level */ dp->p_level = 0; dp_cap_lane_rate_set(dp); mdss_dp_config_ctrl(dp); mdss_dp_state_ctrl(&dp->ctrl_io, 0); Loading