Loading Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt +3 −3 Original line number Diff line number Diff line Loading @@ -81,9 +81,9 @@ pm8916: l14, l15, l16, l17, l18 pm8941: s1, s2, s3, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, l12, l13, l14, l15, l16, l17, l18, l19, l20, l21, l22, l23, l24, lvs1, lvs2, lvs3, mvs1, mvs2 s1, s2, s3, s4, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, l12, l13, l14, l15, l16, l17, l18, l19, l20, l21, l22, l23, l24, lvs1, lvs2, lvs3, 5vs1, 5vs2 The content of each sub-node is defined by the standard binding for regulators - see regulator.txt - with additional custom properties described below: Loading Documentation/pinctrl.txt +1 −1 Original line number Diff line number Diff line Loading @@ -831,7 +831,7 @@ separate memory range only intended for GPIO driving, and the register range dealing with pin config and pin multiplexing get placed into a different memory range and a separate section of the data sheet. A flag "strict" in struct pinctrl_desc is available to check and deny A flag "strict" in struct pinmux_ops is available to check and deny simultaneous access to the same pin from GPIO and pin multiplexing consumers on hardware of this type. The pinctrl driver should set this flag accordingly. Loading Makefile +1 −1 Original line number Diff line number Diff line VERSION = 4 PATCHLEVEL = 4 SUBLEVEL = 23 SUBLEVEL = 24 EXTRAVERSION = NAME = Blurry Fish Butt Loading arch/arm/boot/compressed/head.S +1 −1 Original line number Diff line number Diff line Loading @@ -776,7 +776,7 @@ __armv7_mmu_cache_on: orrne r0, r0, #1 @ MMU enabled movne r1, #0xfffffffd @ domain 0 = client bic r6, r6, #1 << 31 @ 32-bit translation system bic r6, r6, #3 << 0 @ use only ttbr0 bic r6, r6, #(7 << 0) | (1 << 4) @ use only ttbr0 mcrne p15, 0, r3, c2, c0, 0 @ load page table pointer mcrne p15, 0, r0, c8, c7, 0 @ flush I,D TLBs mcr p15, 0, r0, c7, c5, 4 @ ISB Loading arch/arm/boot/dts/sun5i-a13.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -83,7 +83,7 @@ trips { cpu_alert0: cpu_alert0 { /* milliCelsius */ temperature = <850000>; temperature = <85000>; hysteresis = <2000>; type = "passive"; }; Loading Loading
Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt +3 −3 Original line number Diff line number Diff line Loading @@ -81,9 +81,9 @@ pm8916: l14, l15, l16, l17, l18 pm8941: s1, s2, s3, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, l12, l13, l14, l15, l16, l17, l18, l19, l20, l21, l22, l23, l24, lvs1, lvs2, lvs3, mvs1, mvs2 s1, s2, s3, s4, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, l12, l13, l14, l15, l16, l17, l18, l19, l20, l21, l22, l23, l24, lvs1, lvs2, lvs3, 5vs1, 5vs2 The content of each sub-node is defined by the standard binding for regulators - see regulator.txt - with additional custom properties described below: Loading
Documentation/pinctrl.txt +1 −1 Original line number Diff line number Diff line Loading @@ -831,7 +831,7 @@ separate memory range only intended for GPIO driving, and the register range dealing with pin config and pin multiplexing get placed into a different memory range and a separate section of the data sheet. A flag "strict" in struct pinctrl_desc is available to check and deny A flag "strict" in struct pinmux_ops is available to check and deny simultaneous access to the same pin from GPIO and pin multiplexing consumers on hardware of this type. The pinctrl driver should set this flag accordingly. Loading
Makefile +1 −1 Original line number Diff line number Diff line VERSION = 4 PATCHLEVEL = 4 SUBLEVEL = 23 SUBLEVEL = 24 EXTRAVERSION = NAME = Blurry Fish Butt Loading
arch/arm/boot/compressed/head.S +1 −1 Original line number Diff line number Diff line Loading @@ -776,7 +776,7 @@ __armv7_mmu_cache_on: orrne r0, r0, #1 @ MMU enabled movne r1, #0xfffffffd @ domain 0 = client bic r6, r6, #1 << 31 @ 32-bit translation system bic r6, r6, #3 << 0 @ use only ttbr0 bic r6, r6, #(7 << 0) | (1 << 4) @ use only ttbr0 mcrne p15, 0, r3, c2, c0, 0 @ load page table pointer mcrne p15, 0, r0, c8, c7, 0 @ flush I,D TLBs mcr p15, 0, r0, c7, c5, 4 @ ISB Loading
arch/arm/boot/dts/sun5i-a13.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -83,7 +83,7 @@ trips { cpu_alert0: cpu_alert0 { /* milliCelsius */ temperature = <850000>; temperature = <85000>; hysteresis = <2000>; type = "passive"; }; Loading