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Commit 02fdfd70 authored by Murali Karicheri's avatar Murali Karicheri Committed by Michael Turquette
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clk: keystone: add support for post divider register for main pll



Main PLL controller has post divider bits in a separate register in
pll controller. Use the value from this register instead of fixed
divider when available.

Signed-off-by: default avatarMurali Karicheri <m-karicheri2@ti.com>
Signed-off-by: default avatarMichael Turquette <mturquette@baylibre.com>
parent 91990d21
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