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Commit 9aaeaf49 authored by Patrick Daly's avatar Patrick Daly
Browse files

msm: clock-9630: Change halt_check type for pipe clocks



The usb and pcie pipe PHY hardware is not compatible with the branch
clock on/off status check. If a downstream clock is disabled before
the PHY hardware, the PHY hardware disable sequence will fail. If the
downstream clock is disabled after the PHY, the on/off status check
will fail. Therefore, remove this check for these specific clocks.

Change-Id: I3e5edfe598e43d707041d3f271c53f3a86b6fb77
Signed-off-by: default avatarPatrick Daly <pdaly@codeaurora.org>
parent f8fe30a5
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+2 −0
Original line number Diff line number Diff line
@@ -1330,6 +1330,7 @@ static struct branch_clk gcc_pcie_pipe_clk = {
	.bcr_reg = PCIEPHY_PHY_BCR,
	.has_sibling = 0,
	.base = &virt_bases[GCC_BASE],
	.halt_check = DELAY,
	.c = {
		.dbg_name = "gcc_pcie_pipe_clk",
		.parent = &pcie_pipe_clk_src.c,
@@ -1494,6 +1495,7 @@ static struct branch_clk gcc_usb3_pipe_clk = {
	.bcr_reg = USB3PHY_PHY_BCR,
	.has_sibling = 0,
	.base = &virt_bases[GCC_BASE],
	.halt_check = DELAY,
	.c = {
		.dbg_name = "gcc_usb3_pipe_clk",
		.parent = &usb3_pipe_clk_src.c,