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Commit 18602c85 authored by Vikram Mulukutla's avatar Vikram Mulukutla
Browse files

msm: clock-generic: Move mux_reg_ops to clock-local2 



To keep clock-generic generic, move the mux_reg_ops to
clock-local2, since clock-generic is really not meant
to touch hardware directly.

Change-Id: I4edf1c0c4af767844c1fe6b38642e2af39b98a7f
Signed-off-by: default avatarVikram Mulukutla <markivx@codeaurora.org>
parent eff39235

arch/arm/mach-msm/clock-generic.c

+0 −69
Original line number Diff line number Diff line
@@ -216,75 +216,6 @@ struct clk_ops clk_ops_gen_mux = { 
	.get_parent = mux_get_parent,

};



static DEFINE_SPINLOCK(mux_reg_lock);



static int mux_reg_enable(struct mux_clk *clk)

{

	u32 regval;

	unsigned long flags;

	u32 offset = clk->en_reg ? clk->en_offset : clk->offset;



	spin_lock_irqsave(&mux_reg_lock, flags);

	regval = readl_relaxed(*clk->base + offset);

	regval |= clk->en_mask;

	writel_relaxed(regval, *clk->base + offset);

	/* Ensure enable request goes through before returning */

	mb();

	spin_unlock_irqrestore(&mux_reg_lock, flags);



	return 0;

}



static void mux_reg_disable(struct mux_clk *clk)

{

	u32 regval;

	unsigned long flags;

	u32 offset = clk->en_reg ? clk->en_offset : clk->offset;



	spin_lock_irqsave(&mux_reg_lock, flags);

	regval = readl_relaxed(*clk->base + offset);

	regval &= ~clk->en_mask;

	writel_relaxed(regval, *clk->base + offset);

	spin_unlock_irqrestore(&mux_reg_lock, flags);

}



static int mux_reg_set_mux_sel(struct mux_clk *clk, int sel)

{

	u32 regval;

	unsigned long flags;



	spin_lock_irqsave(&mux_reg_lock, flags);

	regval = readl_relaxed(*clk->base + clk->offset);

	regval &= ~(clk->mask << clk->shift);

	regval |= (sel & clk->mask) << clk->shift;

	writel_relaxed(regval, *clk->base + clk->offset);

	/* Ensure switch request goes through before returning */

	mb();

	spin_unlock_irqrestore(&mux_reg_lock, flags);



	return 0;

}



static int mux_reg_get_mux_sel(struct mux_clk *clk)

{

	u32 regval = readl_relaxed(*clk->base + clk->offset);

	return !!((regval >> clk->shift) & clk->mask);

}



static bool mux_reg_is_enabled(struct mux_clk *clk)

{

	u32 regval = readl_relaxed(*clk->base + clk->offset);

	return !!(regval & clk->en_mask);

}



struct clk_mux_ops mux_reg_ops = {

	.enable = mux_reg_enable,

	.disable = mux_reg_disable,

	.set_mux_sel = mux_reg_set_mux_sel,

	.get_mux_sel = mux_reg_get_mux_sel,

	.is_enabled = mux_reg_is_enabled,

};



/* ==================== Divider clock ==================== */



static long __div_round_rate(struct div_data *data, unsigned long rate,

arch/arm/mach-msm/clock-local2.c

+70 −0
Original line number Diff line number Diff line
@@ -25,6 +25,7 @@ 


#include <mach/clk.h>

#include <mach/clk-provider.h>

#include <mach/clock-generic.h>



#include "clock-local2.h"
@@ -1071,6 +1072,67 @@ static int reset_clk_rst(struct clk *c, enum clk_reset_action action) 
	return __branch_clk_reset(RST_REG(rst), action);

}



static DEFINE_SPINLOCK(mux_reg_lock);



static int mux_reg_enable(struct mux_clk *clk)

{

	u32 regval;

	unsigned long flags;

	u32 offset = clk->en_reg ? clk->en_offset : clk->offset;



	spin_lock_irqsave(&mux_reg_lock, flags);

	regval = readl_relaxed(*clk->base + offset);

	regval |= clk->en_mask;

	writel_relaxed(regval, *clk->base + offset);

	/* Ensure enable request goes through before returning */

	mb();

	spin_unlock_irqrestore(&mux_reg_lock, flags);



	return 0;

}



static void mux_reg_disable(struct mux_clk *clk)

{

	u32 regval;

	unsigned long flags;

	u32 offset = clk->en_reg ? clk->en_offset : clk->offset;



	spin_lock_irqsave(&mux_reg_lock, flags);

	regval = readl_relaxed(*clk->base + offset);

	regval &= ~clk->en_mask;

	writel_relaxed(regval, *clk->base + offset);

	spin_unlock_irqrestore(&mux_reg_lock, flags);

}



static int mux_reg_set_mux_sel(struct mux_clk *clk, int sel)

{

	u32 regval;

	unsigned long flags;



	spin_lock_irqsave(&mux_reg_lock, flags);

	regval = readl_relaxed(*clk->base + clk->offset);

	regval &= ~(clk->mask << clk->shift);

	regval |= (sel & clk->mask) << clk->shift;

	writel_relaxed(regval, *clk->base + clk->offset);

	/* Ensure switch request goes through before returning */

	mb();

	spin_unlock_irqrestore(&mux_reg_lock, flags);



	return 0;

}



static int mux_reg_get_mux_sel(struct mux_clk *clk)

{

	u32 regval = readl_relaxed(*clk->base + clk->offset);

	return !!((regval >> clk->shift) & clk->mask);

}



static bool mux_reg_is_enabled(struct mux_clk *clk)

{

	u32 regval = readl_relaxed(*clk->base + clk->offset);

	return !!(regval & clk->en_mask);

}



struct clk_ops clk_ops_empty;



struct clk_ops clk_ops_rst = {
@@ -1171,3 +1233,11 @@ struct clk_ops clk_ops_gate = { 
	.handoff = gate_clk_handoff,

	.list_registers = gate_clk_list_registers,

};



struct clk_mux_ops mux_reg_ops = {

	.enable = mux_reg_enable,

	.disable = mux_reg_disable,

	.set_mux_sel = mux_reg_set_mux_sel,

	.get_mux_sel = mux_reg_get_mux_sel,

	.is_enabled = mux_reg_is_enabled,

};

arch/arm/mach-msm/clock-local2.h

+1 −0
Original line number Diff line number Diff line
@@ -215,6 +215,7 @@ extern struct clk_ops clk_ops_pixel; 
extern struct clk_ops clk_ops_edppixel;

extern struct clk_ops clk_ops_gate;

extern struct clk_ops clk_ops_rst;

extern struct clk_mux_ops mux_reg_ops;



enum handoff pixel_rcg_handoff(struct clk *clk);

enum handoff byte_rcg_handoff(struct clk *clk);

arch/arm/mach-msm/include/mach/clock-generic.h

+0 −1
Original line number Diff line number Diff line
@@ -68,7 +68,6 @@ static inline struct mux_clk *to_mux_clk(struct clk *c) 
}



extern struct clk_ops clk_ops_gen_mux;

extern struct clk_mux_ops mux_reg_ops;



/* ==================== Divider clock ==================== */