Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit eff39235 authored by Vikram Mulukutla's avatar Vikram Mulukutla
Browse files

msm: clock-generic: Allow separate enable/mux-select registers 



Some muxes may have independent registers to control
mux selection and enable/disable. Add an additional
field to the mux clock struct to support this.

Change-Id: I436ca0ba48d186fb76d4e5585be4dd1f41fe7739
Signed-off-by: default avatarVikram Mulukutla <markivx@codeaurora.org>
parent d8047bb8

arch/arm/mach-msm/clock-generic.c

+6 −4
Original line number Diff line number Diff line
@@ -222,11 +222,12 @@ static int mux_reg_enable(struct mux_clk *clk) 
{

	u32 regval;

	unsigned long flags;

	u32 offset = clk->en_reg ? clk->en_offset : clk->offset;



	spin_lock_irqsave(&mux_reg_lock, flags);

	regval = readl_relaxed(*clk->base + clk->offset);

	regval = readl_relaxed(*clk->base + offset);

	regval |= clk->en_mask;

	writel_relaxed(regval, *clk->base + clk->offset);

	writel_relaxed(regval, *clk->base + offset);

	/* Ensure enable request goes through before returning */

	mb();

	spin_unlock_irqrestore(&mux_reg_lock, flags);
@@ -238,11 +239,12 @@ static void mux_reg_disable(struct mux_clk *clk) 
{

	u32 regval;

	unsigned long flags;

	u32 offset = clk->en_reg ? clk->en_offset : clk->offset;



	spin_lock_irqsave(&mux_reg_lock, flags);

	regval = readl_relaxed(*clk->base + clk->offset);

	regval = readl_relaxed(*clk->base + offset);

	regval &= ~clk->en_mask;

	writel_relaxed(regval, *clk->base + clk->offset);

	writel_relaxed(regval, *clk->base + offset);

	spin_unlock_irqrestore(&mux_reg_lock, flags);

}

arch/arm/mach-msm/include/mach/clock-generic.h

+2 −0
Original line number Diff line number Diff line
@@ -52,6 +52,8 @@ struct mux_clk { 
	/* Fields not used by helper function. */

	void *const __iomem *base;

	u32		offset;

	u32		en_offset;

	int		en_reg;

	u32		mask;

	u32		shift;

	u32		en_mask;