Loading arch/arm/mach-msm/clock-8084.c +0 −12 Original line number Diff line number Diff line Loading @@ -4810,17 +4810,6 @@ static struct branch_clk mmss_misc_ahb_clk = { }, }; static struct branch_clk mmss_mmssnoc_bto_ahb_clk = { .cbcr_reg = MMSS_MMSSNOC_BTO_AHB_CBCR, .has_sibling = 1, .base = &virt_bases[MMSS_BASE], .c = { .dbg_name = "mmss_mmssnoc_bto_ahb_clk", .ops = &clk_ops_branch, CLK_INIT(mmss_mmssnoc_bto_ahb_clk.c), }, }; static struct branch_clk mmss_mmssnoc_axi_clk = { .cbcr_reg = MMSS_MMSSNOC_AXI_CBCR, .has_sibling = 1, Loading Loading @@ -5441,7 +5430,6 @@ static struct measure_mux_entry measure_mux[] = { {&bimc_clk.c, GCC_BASE, 0x0155}, {&mmssnoc_ahb_clk.c, MMSS_BASE, 0x0001}, {&mmss_mmssnoc_bto_ahb_clk.c, MMSS_BASE, 0x0002}, {&mmss_misc_ahb_clk.c, MMSS_BASE, 0x0003}, {&mmss_mmssnoc_axi_clk.c, MMSS_BASE, 0x0004}, {&mmss_s0_axi_clk.c, MMSS_BASE, 0x0005}, Loading arch/arm/mach-msm/clock-8092.c +0 −12 Original line number Diff line number Diff line Loading @@ -3920,17 +3920,6 @@ static struct branch_clk mmss_mmssnoc_ahb_clk = { }, }; static struct branch_clk mmss_mmssnoc_bto_ahb_clk = { .cbcr_reg = MMSS_MMSSNOC_BTO_AHB_CBCR, .has_sibling = 1, .base = &virt_bases[MMSS_BASE], .c = { .dbg_name = "mmss_mmssnoc_bto_ahb_clk", .ops = &clk_ops_branch, CLK_INIT(mmss_mmssnoc_bto_ahb_clk.c), }, }; static struct branch_clk mmss_mmssnoc_axi_clk = { .cbcr_reg = MMSS_MMSSNOC_AXI_CBCR, .has_sibling = 1, Loading Loading @@ -5892,7 +5881,6 @@ struct measure_mux_entry measure_mux[] = { /* MMSS */ {&mmss_mmssnoc_ahb_clk.c, MMSS_BASE, 0x0001}, {&mmss_mmssnoc_bto_ahb_clk.c, MMSS_BASE, 0x0002}, {&mmss_misc_ahb_clk.c, MMSS_BASE, 0x0003}, {&mmss_mmssnoc_axi_clk.c, MMSS_BASE, 0x0004}, {&mmss_s0_axi_clk.c, MMSS_BASE, 0x0005}, Loading arch/arm/mach-msm/clock-8226.c +0 −13 Original line number Diff line number Diff line Loading @@ -2521,17 +2521,6 @@ static struct branch_clk mmss_misc_ahb_clk = { }, }; static struct branch_clk mmss_mmssnoc_bto_ahb_clk = { .cbcr_reg = MMSS_MMSSNOC_BTO_AHB_CBCR, .has_sibling = 1, .base = &virt_bases[MMSS_BASE], .c = { .dbg_name = "mmss_mmssnoc_bto_ahb_clk", .ops = &clk_ops_branch, CLK_INIT(mmss_mmssnoc_bto_ahb_clk.c), }, }; static struct branch_clk mmss_mmssnoc_axi_clk = { .cbcr_reg = MMSS_MMSSNOC_AXI_CBCR, .has_sibling = 1, Loading Loading @@ -2633,7 +2622,6 @@ static struct branch_clk venus0_vcodec0_clk = { #ifdef CONFIG_DEBUG_FS static struct measure_mux_entry measure_mux_MMSS[] = { { &mmss_mmssnoc_bto_ahb_clk.c, MMSS_BASE, 0x0002 }, { &mmss_misc_ahb_clk.c, MMSS_BASE, 0x0003 }, { &mmss_mmssnoc_axi_clk.c, MMSS_BASE, 0x0004 }, { &mmss_s0_axi_clk.c, MMSS_BASE, 0x0005 }, Loading Loading @@ -3522,7 +3510,6 @@ static struct clk_lookup msm_clocks_8226[] = { CLK_LOOKUP("cam_gp1_clk", camss_gp1_clk.c, ""), CLK_LOOKUP("iface_clk", camss_micro_ahb_clk.c, ""), CLK_LOOKUP("", mmss_mmssnoc_bto_ahb_clk.c, ""), CLK_LOOKUP("", mmss_mmssnoc_axi_clk.c, ""), CLK_LOOKUP("", mmss_s0_axi_clk.c, ""), Loading arch/arm/mach-msm/clock-8610.c +0 −12 Original line number Diff line number Diff line Loading @@ -2347,17 +2347,6 @@ static struct branch_clk mmss_s0_axi_clk = { }, }; static struct branch_clk mmss_mmssnoc_bto_ahb_clk = { .cbcr_reg = MMSS_MMSSNOC_BTO_AHB_CBCR, .has_sibling = 1, .base = &virt_bases[MMSS_BASE], .c = { .dbg_name = "mmss_mmssnoc_bto_ahb_clk", .ops = &clk_ops_branch, CLK_INIT(mmss_mmssnoc_bto_ahb_clk.c), }, }; static struct branch_clk oxili_ahb_clk = { .cbcr_reg = OXILI_AHB_CBCR, .bcr_reg = OXILI_AHB_BCR, Loading Loading @@ -2992,7 +2981,6 @@ static struct clk_lookup msm_clocks_8610[] = { CLK_LOOKUP("core_clk", mdp_vsync_clk.c, ""), CLK_LOOKUP("core_clk", mmss_misc_ahb_clk.c, ""), CLK_LOOKUP("core_clk", mmss_s0_axi_clk.c, ""), CLK_LOOKUP("core_clk", mmss_mmssnoc_bto_ahb_clk.c, ""), CLK_LOOKUP("core_clk", mmss_mmssnoc_axi_clk.c, ""), CLK_LOOKUP("core_clk", vfe_clk.c, ""), CLK_LOOKUP("core_clk", vfe_ahb_clk.c, ""), Loading arch/arm/mach-msm/clock-mmss-8974.c +0 −11 Original line number Diff line number Diff line Loading @@ -1913,17 +1913,6 @@ static struct branch_clk mmss_misc_ahb_clk = { }, }; static struct branch_clk mmss_mmssnoc_bto_ahb_clk = { .cbcr_reg = MMSS_MMSSNOC_BTO_AHB_CBCR, .has_sibling = 1, .base = &virt_bases[MMSS_BASE], .c = { .dbg_name = "mmss_mmssnoc_bto_ahb_clk", .ops = &clk_ops_branch, CLK_INIT(mmss_mmssnoc_bto_ahb_clk.c), }, }; static struct branch_clk mmss_mmssnoc_axi_clk = { .cbcr_reg = MMSS_MMSSNOC_AXI_CBCR, .has_sibling = 1, Loading Loading
arch/arm/mach-msm/clock-8084.c +0 −12 Original line number Diff line number Diff line Loading @@ -4810,17 +4810,6 @@ static struct branch_clk mmss_misc_ahb_clk = { }, }; static struct branch_clk mmss_mmssnoc_bto_ahb_clk = { .cbcr_reg = MMSS_MMSSNOC_BTO_AHB_CBCR, .has_sibling = 1, .base = &virt_bases[MMSS_BASE], .c = { .dbg_name = "mmss_mmssnoc_bto_ahb_clk", .ops = &clk_ops_branch, CLK_INIT(mmss_mmssnoc_bto_ahb_clk.c), }, }; static struct branch_clk mmss_mmssnoc_axi_clk = { .cbcr_reg = MMSS_MMSSNOC_AXI_CBCR, .has_sibling = 1, Loading Loading @@ -5441,7 +5430,6 @@ static struct measure_mux_entry measure_mux[] = { {&bimc_clk.c, GCC_BASE, 0x0155}, {&mmssnoc_ahb_clk.c, MMSS_BASE, 0x0001}, {&mmss_mmssnoc_bto_ahb_clk.c, MMSS_BASE, 0x0002}, {&mmss_misc_ahb_clk.c, MMSS_BASE, 0x0003}, {&mmss_mmssnoc_axi_clk.c, MMSS_BASE, 0x0004}, {&mmss_s0_axi_clk.c, MMSS_BASE, 0x0005}, Loading
arch/arm/mach-msm/clock-8092.c +0 −12 Original line number Diff line number Diff line Loading @@ -3920,17 +3920,6 @@ static struct branch_clk mmss_mmssnoc_ahb_clk = { }, }; static struct branch_clk mmss_mmssnoc_bto_ahb_clk = { .cbcr_reg = MMSS_MMSSNOC_BTO_AHB_CBCR, .has_sibling = 1, .base = &virt_bases[MMSS_BASE], .c = { .dbg_name = "mmss_mmssnoc_bto_ahb_clk", .ops = &clk_ops_branch, CLK_INIT(mmss_mmssnoc_bto_ahb_clk.c), }, }; static struct branch_clk mmss_mmssnoc_axi_clk = { .cbcr_reg = MMSS_MMSSNOC_AXI_CBCR, .has_sibling = 1, Loading Loading @@ -5892,7 +5881,6 @@ struct measure_mux_entry measure_mux[] = { /* MMSS */ {&mmss_mmssnoc_ahb_clk.c, MMSS_BASE, 0x0001}, {&mmss_mmssnoc_bto_ahb_clk.c, MMSS_BASE, 0x0002}, {&mmss_misc_ahb_clk.c, MMSS_BASE, 0x0003}, {&mmss_mmssnoc_axi_clk.c, MMSS_BASE, 0x0004}, {&mmss_s0_axi_clk.c, MMSS_BASE, 0x0005}, Loading
arch/arm/mach-msm/clock-8226.c +0 −13 Original line number Diff line number Diff line Loading @@ -2521,17 +2521,6 @@ static struct branch_clk mmss_misc_ahb_clk = { }, }; static struct branch_clk mmss_mmssnoc_bto_ahb_clk = { .cbcr_reg = MMSS_MMSSNOC_BTO_AHB_CBCR, .has_sibling = 1, .base = &virt_bases[MMSS_BASE], .c = { .dbg_name = "mmss_mmssnoc_bto_ahb_clk", .ops = &clk_ops_branch, CLK_INIT(mmss_mmssnoc_bto_ahb_clk.c), }, }; static struct branch_clk mmss_mmssnoc_axi_clk = { .cbcr_reg = MMSS_MMSSNOC_AXI_CBCR, .has_sibling = 1, Loading Loading @@ -2633,7 +2622,6 @@ static struct branch_clk venus0_vcodec0_clk = { #ifdef CONFIG_DEBUG_FS static struct measure_mux_entry measure_mux_MMSS[] = { { &mmss_mmssnoc_bto_ahb_clk.c, MMSS_BASE, 0x0002 }, { &mmss_misc_ahb_clk.c, MMSS_BASE, 0x0003 }, { &mmss_mmssnoc_axi_clk.c, MMSS_BASE, 0x0004 }, { &mmss_s0_axi_clk.c, MMSS_BASE, 0x0005 }, Loading Loading @@ -3522,7 +3510,6 @@ static struct clk_lookup msm_clocks_8226[] = { CLK_LOOKUP("cam_gp1_clk", camss_gp1_clk.c, ""), CLK_LOOKUP("iface_clk", camss_micro_ahb_clk.c, ""), CLK_LOOKUP("", mmss_mmssnoc_bto_ahb_clk.c, ""), CLK_LOOKUP("", mmss_mmssnoc_axi_clk.c, ""), CLK_LOOKUP("", mmss_s0_axi_clk.c, ""), Loading
arch/arm/mach-msm/clock-8610.c +0 −12 Original line number Diff line number Diff line Loading @@ -2347,17 +2347,6 @@ static struct branch_clk mmss_s0_axi_clk = { }, }; static struct branch_clk mmss_mmssnoc_bto_ahb_clk = { .cbcr_reg = MMSS_MMSSNOC_BTO_AHB_CBCR, .has_sibling = 1, .base = &virt_bases[MMSS_BASE], .c = { .dbg_name = "mmss_mmssnoc_bto_ahb_clk", .ops = &clk_ops_branch, CLK_INIT(mmss_mmssnoc_bto_ahb_clk.c), }, }; static struct branch_clk oxili_ahb_clk = { .cbcr_reg = OXILI_AHB_CBCR, .bcr_reg = OXILI_AHB_BCR, Loading Loading @@ -2992,7 +2981,6 @@ static struct clk_lookup msm_clocks_8610[] = { CLK_LOOKUP("core_clk", mdp_vsync_clk.c, ""), CLK_LOOKUP("core_clk", mmss_misc_ahb_clk.c, ""), CLK_LOOKUP("core_clk", mmss_s0_axi_clk.c, ""), CLK_LOOKUP("core_clk", mmss_mmssnoc_bto_ahb_clk.c, ""), CLK_LOOKUP("core_clk", mmss_mmssnoc_axi_clk.c, ""), CLK_LOOKUP("core_clk", vfe_clk.c, ""), CLK_LOOKUP("core_clk", vfe_ahb_clk.c, ""), Loading
arch/arm/mach-msm/clock-mmss-8974.c +0 −11 Original line number Diff line number Diff line Loading @@ -1913,17 +1913,6 @@ static struct branch_clk mmss_misc_ahb_clk = { }, }; static struct branch_clk mmss_mmssnoc_bto_ahb_clk = { .cbcr_reg = MMSS_MMSSNOC_BTO_AHB_CBCR, .has_sibling = 1, .base = &virt_bases[MMSS_BASE], .c = { .dbg_name = "mmss_mmssnoc_bto_ahb_clk", .ops = &clk_ops_branch, CLK_INIT(mmss_mmssnoc_bto_ahb_clk.c), }, }; static struct branch_clk mmss_mmssnoc_axi_clk = { .cbcr_reg = MMSS_MMSSNOC_AXI_CBCR, .has_sibling = 1, Loading