Loading drivers/power/qcom/msm-pm.c +2 −2 Original line number Diff line number Diff line Loading @@ -96,7 +96,7 @@ static inline void msm_arch_idle(void) static bool msm_pm_is_L1_writeback(void) { u32 cache_id; u32 cache_id = 0; #if defined(CONFIG_CPU_V7) u32 sel = 0; Loading @@ -106,7 +106,7 @@ static bool msm_pm_is_L1_writeback(void) :[ccsidr]"=r" (cache_id) :[ccselr]"r" (sel) ); return cache_id & BIT(31); return cache_id & BIT(30); #elif defined(CONFIG_ARM64) u32 sel = 0; asm volatile("msr csselr_el1, %[ccselr]\n\t" Loading Loading
drivers/power/qcom/msm-pm.c +2 −2 Original line number Diff line number Diff line Loading @@ -96,7 +96,7 @@ static inline void msm_arch_idle(void) static bool msm_pm_is_L1_writeback(void) { u32 cache_id; u32 cache_id = 0; #if defined(CONFIG_CPU_V7) u32 sel = 0; Loading @@ -106,7 +106,7 @@ static bool msm_pm_is_L1_writeback(void) :[ccsidr]"=r" (cache_id) :[ccselr]"r" (sel) ); return cache_id & BIT(31); return cache_id & BIT(30); #elif defined(CONFIG_ARM64) u32 sel = 0; asm volatile("msr csselr_el1, %[ccselr]\n\t" Loading