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Commit e064da89 authored by Vikram Mulukutla's avatar Vikram Mulukutla
Browse files

qcom: clock-cpu-8994: Setup PLL dividers in early_init 



As part of the CDIV divider workaround, we no longer
explicitly init the post-dividers until we actually
need to use the main output of the PLL to generate
frequencies less than 1.2Ghz. However, since the main
outputs are still enabled, the divider needs to be set
to div-2 even if we're running off the early output

Change-Id: Iff88dd722ab3356eb5a5957855be235596f951e2
Signed-off-by: default avatarVikram Mulukutla <markivx@codeaurora.org>
parent 6b74537a

drivers/clk/qcom/clock-cpu-8994.c

+23 −0
Original line number Diff line number Diff line
@@ -2160,6 +2160,7 @@ module_exit(cpu_clock_8994_exit); 
#define ALIAS0_GLB_BASE_PHY 0xF900D000

#define ALIAS1_GLB_BASE_PHY 0xF900F000

#define C1_PLL_BASE_PHY 0xF9016000

#define C0_PLL_BASE_PHY 0xF9015000



int __init cpu_clock_8994_init_a57_v2(void)

{
@@ -2182,11 +2183,30 @@ int __init cpu_clock_8994_init_a57_v2(void) 
		goto iomap_fail;

	}



	vbases[C0_PLL_BASE] = ioremap(C0_PLL_BASE_PHY, SZ_4K);

	if (!vbases[C0_PLL_BASE]) {

		WARN(1, "Unable to ioremap A53 pll base. Can't configure A53 clocks.\n");

		ret = -ENOMEM;

		goto iomap_c0_pll_fail;

	}



	vbases[C1_PLL_BASE] = ioremap(C1_PLL_BASE_PHY, SZ_4K);

	if (!vbases[C1_PLL_BASE]) {

		WARN(1, "Unable to ioremap A57 pll base. Can't configure A57 clocks.\n");

		ret = -ENOMEM;

		goto iomap_c1_pll_fail;

	}



	/* Select GPLL0 for 600MHz on the A57s */

	writel_relaxed(0x6, vbases[ALIAS1_GLB_BASE] + MUX_OFFSET);

	/* Select GPLL0 for 600MHz on the A53s */

	writel_relaxed(0x6, vbases[ALIAS0_GLB_BASE] + MUX_OFFSET);



	/* Setup dividers and outputs */

	writel_relaxed(0x109, vbases[C0_PLL_BASE] + C0_PLLA_USER_CTL);

	writel_relaxed(0x109, vbases[C1_PLL_BASE] + C1_PLL_USER_CTL);

	writel_relaxed(0x109, vbases[C1_PLL_BASE] + C1_PLLA_USER_CTL);



	/* Ensure write goes through before A53s are brought up. */

	mb();

	udelay(5);
@@ -2194,6 +2214,9 @@ int __init cpu_clock_8994_init_a57_v2(void) 
	pr_cont("%s: finished configuring A57 cluster clocks.\n",

		msm8992 ? "msm8992" : "msm8994-v2");



iomap_c1_pll_fail:

	iounmap(vbases[C0_PLL_BASE]);

iomap_c0_pll_fail:

	iounmap(vbases[ALIAS1_GLB_BASE]);

iomap_fail:

	iounmap(vbases[ALIAS0_GLB_BASE]);