Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit da22980c authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
Browse files

Merge "iommu: msm: Workaround for SMMU PTE prefetch HW bug"

parents 07084f1e 236cef42

drivers/iommu/msm_iommu_pagetable.c

+2 −1
Original line number Diff line number Diff line
@@ -26,6 +26,7 @@ 


#define NUM_FL_PTE      4096

#define NUM_SL_PTE      256

#define GUARD_PTE       2

#define NUM_TEX_CLASS   8



/* First-level page table bits */
@@ -173,7 +174,7 @@ static u32 *make_second_level(struct msm_iommu_pt *pt, 
		goto fail;

	}

	memset(sl, 0, SZ_4K);

	clean_pte(sl, sl + NUM_SL_PTE, pt->redirect);

	clean_pte(sl, sl + NUM_SL_PTE + GUARD_PTE, pt->redirect);



	*fl_pte = ((((int)__pa(sl)) & FL_BASE_MASK) | \

			FL_TYPE_TABLE);

drivers/iommu/msm_iommu_pagetable_lpae.c

+3 −2
Original line number Diff line number Diff line
@@ -24,6 +24,7 @@ 
#define NUM_FL_PTE      4   /* First level */

#define NUM_SL_PTE      512 /* Second level */

#define NUM_TL_PTE      512 /* Third level */

#define GUARD_PTE       2



#define PTE_SIZE	8
@@ -191,7 +192,7 @@ static inline u64 *make_second_level_tbl(s32 redirect, u64 *fl_pte) 
		goto fail;

	}

	memset(sl, 0, SZ_4K);

	clean_pte(sl, sl + NUM_SL_PTE, redirect);

	clean_pte(sl, sl + NUM_SL_PTE + GUARD_PTE, redirect);



	/* Leave APTable bits 0 to let next level decide access permissinons */

	*fl_pte = (((phys_addr_t)__pa(sl)) & FLSL_BASE_MASK) | FLSL_TYPE_TABLE;
@@ -209,7 +210,7 @@ static inline u64 *make_third_level_tbl(s32 redirect, u64 *sl_pte) 
		goto fail;

	}

	memset(tl, 0, SZ_4K);

	clean_pte(tl, tl + NUM_TL_PTE, redirect);

	clean_pte(tl, tl + NUM_TL_PTE + GUARD_PTE, redirect);



	/* Leave APTable bits 0 to let next level decide access permissions */

	*sl_pte = (((phys_addr_t)__pa(tl)) & FLSL_BASE_MASK) | FLSL_TYPE_TABLE;