Loading arch/arm/boot/dts/qcom/msm8994.dtsi +28 −29 Original line number Diff line number Diff line Loading @@ -2393,11 +2393,10 @@ compatible = "qcom,i2c-msm-v2"; #address-cells = <1>; #size-cells = <0>; reg-names = "qup_phys_addr", "bam_phys_addr"; reg = <0xf9923000 0x1000>, <0xf9904000 0x19000>; interrupt-names = "qup_irq", "bam_irq"; interrupts = <0 95 0>, <0 238 0>; reg-names = "qup_phys_addr"; reg = <0xf9923000 0x1000>; interrupt-names = "qup_irq"; interrupts = <0 95 0>; qcom,clk-freq-out = <400000>; qcom,clk-freq-in = <19200000>; clock-names = "iface_clk", "core_clk"; Loading @@ -2409,10 +2408,10 @@ pinctrl-1 = <&i2c_1_sleep>; qcom,noise-rjct-scl = <0>; qcom,noise-rjct-sda = <0>; qcom,bam-pipe-idx-cons = <10>; qcom,bam-pipe-idx-prod = <11>; qcom,master-id = <86>; dmas = <&dma_blsp1 10 64 0x20000020 0x20>, <&dma_blsp1 11 32 0x20000020 0x20>; dma-names = "tx", "rx"; status = "disabled"; }; Loading @@ -2437,11 +2436,10 @@ compatible = "qcom,i2c-msm-v2"; #address-cells = <1>; #size-cells = <0>; reg-names = "qup_phys_addr", "bam_phys_addr"; reg = <0xf9924000 0x1000>, <0xf9904000 0x19000>; interrupt-names = "qup_irq", "bam_irq"; interrupts = <0 96 0>, <0 238 0>; reg-names = "qup_phys_addr"; reg = <0xf9924000 0x1000>; interrupt-names = "qup_irq"; interrupts = <0 96 0>; qcom,clk-freq-out = <400000>; qcom,clk-freq-in = <19200000>; clock-names = "iface_clk", "core_clk"; Loading @@ -2453,8 +2451,9 @@ pinctrl-1 = <&i2c_2_sleep>; qcom,noise-rjct-scl = <0>; qcom,noise-rjct-sda = <0>; qcom,bam-pipe-idx-cons = <14>; qcom,bam-pipe-idx-prod = <15>; dmas = <&dma_blsp1 14 64 0x20000020 0x20>, <&dma_blsp1 15 32 0x20000020 0x20>; dma-names = "tx", "rx"; qcom,master-id = <86>; }; Loading @@ -2462,11 +2461,10 @@ compatible = "qcom,i2c-msm-v2"; #address-cells = <1>; #size-cells = <0>; reg-names = "qup_phys_addr", "bam_phys_addr"; reg = <0xf9967000 0x1000>, <0xf9944000 0x19000>; interrupt-names = "qup_irq", "bam_irq"; interrupts = <0 105 0>, <0 239 0>; reg-names = "qup_phys_addr"; reg = <0xf9967000 0x1000>; interrupt-names = "qup_irq"; interrupts = <0 105 0>; qcom,clk-freq-out = <100000>; qcom,clk-freq-in = <19200000>; clock-names = "iface_clk", "core_clk"; Loading @@ -2478,8 +2476,9 @@ pinctrl-1 = <&i2c_5_sleep>; qcom,noise-rjct-scl = <0>; qcom,noise-rjct-sda = <0>; qcom,bam-pipe-idx-cons = <20>; qcom,bam-pipe-idx-prod = <21>; dmas = <&dma_blsp1 20 64 0x20000020 0x20>, <&dma_blsp1 21 32 0x20000020 0x20>; dma-names = "tx", "rx"; qcom,master-id = <84>; }; Loading @@ -2488,11 +2487,10 @@ #address-cells = <1>; #size-cells = <0>; status = "disabled"; reg-names = "qup_phys_addr", "bam_phys_addr"; reg = <0xf9928000 0x1000>, <0xf9904000 0x19000>; interrupt-names = "qup_irq", "bam_irq"; interrupts = <0 100 0>, <0 238 0>; reg-names = "qup_phys_addr"; reg = <0xf9928000 0x1000>; interrupt-names = "qup_irq"; interrupts = <0 100 0>; qcom,clk-freq-out = <400000>; qcom,clk-freq-in = <19200000>; clock-names = "iface_clk", "core_clk"; Loading @@ -2504,8 +2502,9 @@ pinctrl-1 = <&i2c_6_sleep>; qcom,noise-rjct-scl = <0>; qcom,noise-rjct-sda = <0>; qcom,bam-pipe-idx-cons = <22>; qcom,bam-pipe-idx-prod = <23>; dmas = <&dma_blsp1 22 64 0x20000020 0x20>, <&dma_blsp1 23 32 0x20000020 0x20>; dma-names = "tx", "rx"; qcom,master-id = <86>; }; Loading Loading
arch/arm/boot/dts/qcom/msm8994.dtsi +28 −29 Original line number Diff line number Diff line Loading @@ -2393,11 +2393,10 @@ compatible = "qcom,i2c-msm-v2"; #address-cells = <1>; #size-cells = <0>; reg-names = "qup_phys_addr", "bam_phys_addr"; reg = <0xf9923000 0x1000>, <0xf9904000 0x19000>; interrupt-names = "qup_irq", "bam_irq"; interrupts = <0 95 0>, <0 238 0>; reg-names = "qup_phys_addr"; reg = <0xf9923000 0x1000>; interrupt-names = "qup_irq"; interrupts = <0 95 0>; qcom,clk-freq-out = <400000>; qcom,clk-freq-in = <19200000>; clock-names = "iface_clk", "core_clk"; Loading @@ -2409,10 +2408,10 @@ pinctrl-1 = <&i2c_1_sleep>; qcom,noise-rjct-scl = <0>; qcom,noise-rjct-sda = <0>; qcom,bam-pipe-idx-cons = <10>; qcom,bam-pipe-idx-prod = <11>; qcom,master-id = <86>; dmas = <&dma_blsp1 10 64 0x20000020 0x20>, <&dma_blsp1 11 32 0x20000020 0x20>; dma-names = "tx", "rx"; status = "disabled"; }; Loading @@ -2437,11 +2436,10 @@ compatible = "qcom,i2c-msm-v2"; #address-cells = <1>; #size-cells = <0>; reg-names = "qup_phys_addr", "bam_phys_addr"; reg = <0xf9924000 0x1000>, <0xf9904000 0x19000>; interrupt-names = "qup_irq", "bam_irq"; interrupts = <0 96 0>, <0 238 0>; reg-names = "qup_phys_addr"; reg = <0xf9924000 0x1000>; interrupt-names = "qup_irq"; interrupts = <0 96 0>; qcom,clk-freq-out = <400000>; qcom,clk-freq-in = <19200000>; clock-names = "iface_clk", "core_clk"; Loading @@ -2453,8 +2451,9 @@ pinctrl-1 = <&i2c_2_sleep>; qcom,noise-rjct-scl = <0>; qcom,noise-rjct-sda = <0>; qcom,bam-pipe-idx-cons = <14>; qcom,bam-pipe-idx-prod = <15>; dmas = <&dma_blsp1 14 64 0x20000020 0x20>, <&dma_blsp1 15 32 0x20000020 0x20>; dma-names = "tx", "rx"; qcom,master-id = <86>; }; Loading @@ -2462,11 +2461,10 @@ compatible = "qcom,i2c-msm-v2"; #address-cells = <1>; #size-cells = <0>; reg-names = "qup_phys_addr", "bam_phys_addr"; reg = <0xf9967000 0x1000>, <0xf9944000 0x19000>; interrupt-names = "qup_irq", "bam_irq"; interrupts = <0 105 0>, <0 239 0>; reg-names = "qup_phys_addr"; reg = <0xf9967000 0x1000>; interrupt-names = "qup_irq"; interrupts = <0 105 0>; qcom,clk-freq-out = <100000>; qcom,clk-freq-in = <19200000>; clock-names = "iface_clk", "core_clk"; Loading @@ -2478,8 +2476,9 @@ pinctrl-1 = <&i2c_5_sleep>; qcom,noise-rjct-scl = <0>; qcom,noise-rjct-sda = <0>; qcom,bam-pipe-idx-cons = <20>; qcom,bam-pipe-idx-prod = <21>; dmas = <&dma_blsp1 20 64 0x20000020 0x20>, <&dma_blsp1 21 32 0x20000020 0x20>; dma-names = "tx", "rx"; qcom,master-id = <84>; }; Loading @@ -2488,11 +2487,10 @@ #address-cells = <1>; #size-cells = <0>; status = "disabled"; reg-names = "qup_phys_addr", "bam_phys_addr"; reg = <0xf9928000 0x1000>, <0xf9904000 0x19000>; interrupt-names = "qup_irq", "bam_irq"; interrupts = <0 100 0>, <0 238 0>; reg-names = "qup_phys_addr"; reg = <0xf9928000 0x1000>; interrupt-names = "qup_irq"; interrupts = <0 100 0>; qcom,clk-freq-out = <400000>; qcom,clk-freq-in = <19200000>; clock-names = "iface_clk", "core_clk"; Loading @@ -2504,8 +2502,9 @@ pinctrl-1 = <&i2c_6_sleep>; qcom,noise-rjct-scl = <0>; qcom,noise-rjct-sda = <0>; qcom,bam-pipe-idx-cons = <22>; qcom,bam-pipe-idx-prod = <23>; dmas = <&dma_blsp1 22 64 0x20000020 0x20>, <&dma_blsp1 23 32 0x20000020 0x20>; dma-names = "tx", "rx"; qcom,master-id = <86>; }; Loading