Merge "ARM64: dts: qcom: Add clock properties to GDSC on MSM8994" (d34c961b) · Commits · e / devices / android_kernel_sony_msm8994

arch/arm/boot/dts/qcom/msm8994.dtsi

+38 −0

Original line number	Diff line number	Diff line
		@@ -1583,41 +1583,77 @@
		};

		&gdsc_venus {
		clock-names = "ocmem_clk", "bus_clk", "core_clk";
		clocks = <&clock_mmss clk_venus0_ocmemnoc_clk>,
		<&clock_mmss clk_venus0_axi_clk>,
		<&clock_mmss clk_venus0_vcodec0_clk>;
		status = "ok";
		};

		&gdsc_venus_core0 {
		qcom,support-hw-trigger;
		clock-names = "core0_clk";
		clocks = <&clock_mmss clk_venus0_core0_vcodec_clk>;
		status = "ok";
		};

		&gdsc_venus_core1 {
		qcom,support-hw-trigger;
		clock-names = "core1_clk";
		clocks = <&clock_mmss clk_venus0_core1_vcodec_clk>;
		status = "ok";
		};

		&gdsc_venus_core2 {
		qcom,support-hw-trigger;
		clock-names = "core2_clk";
		clocks = <&clock_mmss clk_venus0_core2_vcodec_clk>;
		status = "ok";
		};

		&gdsc_mdss {
		clock-names = "bus_clk", "core_clk";
		clocks = <&clock_mmss clk_mdss_axi_clk>,
		<&clock_mmss clk_mdss_mdp_clk>;
		status = "ok";
		};

		&gdsc_camss_top {
		clock-names = "csi0_clk", "csi1_clk", "bus_clk";
		clocks = <&clock_mmss clk_camss_csi_vfe0_clk>,
		<&clock_mmss clk_camss_csi_vfe1_clk>,
		<&clock_mmss clk_camss_micro_ahb_clk>;
		status = "ok";
		};

		&gdsc_jpeg {
		clock-names = "bus_clk", "core0_clk", "core1_clk", "core2_clk";
		clocks = <&clock_mmss clk_camss_jpeg_jpeg_axi_clk>,
		<&clock_mmss clk_camss_jpeg_jpeg0_clk>,
		<&clock_mmss clk_camss_jpeg_jpeg1_clk>,
		<&clock_mmss clk_camss_jpeg_jpeg2_clk>;
		status = "ok";
		};

		&gdsc_vfe {
		clock-names = "bus_clk", "core0_clk", "core1_clk";
		clocks = <&clock_mmss clk_camss_vfe_vfe_axi_clk>,
		<&clock_mmss clk_camss_vfe_vfe0_clk>,
		<&clock_mmss clk_camss_vfe_vfe1_clk>;
		status = "ok";
		};

		&gdsc_cpp {
		clock-names = "bus_clk", "core_clk";
		clocks = <&clock_mmss clk_camss_vfe_cpp_axi_clk>,
		<&clock_mmss clk_camss_vfe_cpp_clk>;
		status = "ok";
		};

		&gdsc_fd {
		clock-names = "bus_clk", "core_clk";
		clocks = <&clock_mmss clk_fd_axi_clk>,
		<&clock_mmss clk_fd_core_clk>;
		status = "ok";
		};

		@@ -1626,6 +1662,8 @@
		};

		&gdsc_oxili_gx {
		clock-names = "core_clk";
		clocks = <&clock_mmss clk_oxili_gfx3d_clk>;
		status = "ok";
		parent-supply = <&pmi8994_s2_corner>;
		};