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Commit da3db248 authored by Junjie Wu's avatar Junjie Wu
Browse files

ARM64: dts: qcom: Add clock properties to GDSC on MSM8994



Some GDSCs need to manipulate clock states when powering on/off
their power domains. Add corresponding clock properties to device tree
node.

Change-Id: I71f86771126242613a17c141899883da01c3c95a
Signed-off-by: default avatarJunjie Wu <junjiew@codeaurora.org>
parent c82fe615
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+38 −0
Original line number Diff line number Diff line
@@ -1517,41 +1517,77 @@
};

&gdsc_venus {
	clock-names = "ocmem_clk", "bus_clk", "core_clk";
	clocks = <&clock_mmss clk_venus0_ocmemnoc_clk>,
		 <&clock_mmss clk_venus0_axi_clk>,
		 <&clock_mmss clk_venus0_vcodec0_clk>;
	status = "ok";
};

&gdsc_venus_core0 {
	qcom,support-hw-trigger;
	clock-names = "core0_clk";
	clocks = <&clock_mmss clk_venus0_core0_vcodec_clk>;
	status = "ok";
};

&gdsc_venus_core1 {
	qcom,support-hw-trigger;
	clock-names = "core1_clk";
	clocks = <&clock_mmss clk_venus0_core1_vcodec_clk>;
	status = "ok";
};

&gdsc_venus_core2 {
	qcom,support-hw-trigger;
	clock-names = "core2_clk";
	clocks = <&clock_mmss clk_venus0_core2_vcodec_clk>;
	status = "ok";
};

&gdsc_mdss {
	clock-names = "bus_clk", "core_clk";
	clocks = <&clock_mmss clk_mdss_axi_clk>,
		 <&clock_mmss clk_mdss_mdp_clk>;
	status = "ok";
};

&gdsc_camss_top {
	clock-names = "csi0_clk", "csi1_clk", "bus_clk";
	clocks = <&clock_mmss clk_camss_csi_vfe0_clk>,
		 <&clock_mmss clk_camss_csi_vfe1_clk>,
		 <&clock_mmss clk_camss_micro_ahb_clk>;
	status = "ok";
};

&gdsc_jpeg {
	clock-names = "bus_clk", "core0_clk", "core1_clk", "core2_clk";
	clocks = <&clock_mmss clk_camss_jpeg_jpeg_axi_clk>,
		 <&clock_mmss clk_camss_jpeg_jpeg0_clk>,
		 <&clock_mmss clk_camss_jpeg_jpeg1_clk>,
		 <&clock_mmss clk_camss_jpeg_jpeg2_clk>;
	status = "ok";
};

&gdsc_vfe {
	clock-names = "bus_clk", "core0_clk", "core1_clk";
	clocks = <&clock_mmss clk_camss_vfe_vfe_axi_clk>,
		 <&clock_mmss clk_camss_vfe_vfe0_clk>,
		 <&clock_mmss clk_camss_vfe_vfe1_clk>;
	status = "ok";
};

&gdsc_cpp {
	clock-names = "bus_clk", "core_clk";
	clocks = <&clock_mmss clk_camss_vfe_cpp_axi_clk>,
		 <&clock_mmss clk_camss_vfe_cpp_clk>;
	status = "ok";
};

&gdsc_fd {
	clock-names = "bus_clk", "core_clk";
	clocks = <&clock_mmss clk_fd_axi_clk>,
		 <&clock_mmss clk_fd_core_clk>;
	status = "ok";
};

@@ -1560,6 +1596,8 @@
};

&gdsc_oxili_gx {
	clock-names = "core_clk";
	clocks = <&clock_mmss clk_oxili_gfx3d_clk>;
	status = "ok";
	parent-supply = <&pmi8994_s2_corner>;
};