Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit ca735784 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
Browse files

Merge "msm: kgsl: Flush the UCHE when context changes"

parents 6b0b253d 36b9697e

drivers/gpu/msm/adreno.h

+1 −0
Original line number Diff line number Diff line
@@ -356,6 +356,7 @@ enum adreno_regs { 
	ADRENO_REG_SQ_INST_STORE_MANAGMENT,

	ADRENO_REG_TP0_CHICKEN,

	ADRENO_REG_RBBM_RBBM_CTL,

	ADRENO_REG_UCHE_INVALIDATE0,

	ADRENO_REG_REGISTER_MAX,

};

drivers/gpu/msm/adreno_a3xx.c

+2 −0
Original line number Diff line number Diff line
@@ -2263,6 +2263,8 @@ static unsigned int a3xx_register_offsets[ADRENO_REG_REGISTER_MAX] = { 
	ADRENO_REG_DEFINE(ADRENO_REG_TP0_CHICKEN, A3XX_TP0_CHICKEN),

	ADRENO_REG_DEFINE(ADRENO_REG_RBBM_RBBM_CTL, A3XX_RBBM_RBBM_CTL),

	ADRENO_REG_DEFINE(ADRENO_REG_RBBM_SW_RESET_CMD, A3XX_RBBM_SW_RESET_CMD),

	ADRENO_REG_DEFINE(ADRENO_REG_UCHE_INVALIDATE0,

			A3XX_UCHE_CACHE_INVALIDATE0_REG),

};



const struct adreno_reg_offsets a3xx_reg_offsets = {

drivers/gpu/msm/adreno_a4xx.c

+1 −0
Original line number Diff line number Diff line
@@ -607,6 +607,7 @@ static unsigned int a4xx_register_offsets[ADRENO_REG_REGISTER_MAX] = { 
				A4XX_SP_FS_OBJ_START),

	ADRENO_REG_DEFINE(ADRENO_REG_RBBM_RBBM_CTL, A4XX_RBBM_RBBM_CTL),

	ADRENO_REG_DEFINE(ADRENO_REG_RBBM_SW_RESET_CMD, A4XX_RBBM_SW_RESET_CMD),

	ADRENO_REG_DEFINE(ADRENO_REG_UCHE_INVALIDATE0, A4XX_UCHE_INVALIDATE0),

};



const struct adreno_reg_offsets a4xx_reg_offsets = {

drivers/gpu/msm/adreno_drawctxt.c

+10 −2
Original line number Diff line number Diff line
@@ -503,7 +503,7 @@ static int adreno_context_restore(struct adreno_device *adreno_dev, 
				  struct adreno_context *context)

{

	struct kgsl_device *device;

	unsigned int cmds[5];

	unsigned int cmds[8];



	if (adreno_dev == NULL || context == NULL)

		return -EINVAL;
@@ -517,8 +517,16 @@ static int adreno_context_restore(struct adreno_device *adreno_dev, 
	cmds[3] = device->memstore.gpuaddr +

		KGSL_MEMSTORE_OFFSET(KGSL_MEMSTORE_GLOBAL, current_context);

	cmds[4] = context->base.id;

	/* Flush the UCHE for new context */

	cmds[5] = cp_type0_packet(

		adreno_getreg(adreno_dev, ADRENO_REG_UCHE_INVALIDATE0), 2);

	cmds[6] = 0;

	if (adreno_is_a4xx(adreno_dev))

		cmds[7] = 0x12;

	else if (adreno_is_a3xx(adreno_dev))

		cmds[7] = 0x90000000;

	return adreno_ringbuffer_issuecmds(device, context,

				KGSL_CMD_FLAGS_NONE, cmds, 5);

				KGSL_CMD_FLAGS_NONE, cmds, 8);

}



/**