qcom: msm-pm: fix bug in finding whether cache is WT or WB

Bit 30 in Cache size ID register indicates write back cache for
ARMV8 architecture. Fix the bug to use bit30 in finding writeback
cache.

Change-Id: I40b0325ee5c286e2704f530a618c0b7d249a6d50
Signed-off-by: Anji Jonnala <anjir@codeaurora.org>