Loading arch/arm/mach-msm/board-8084.c +0 −3 Original line number Diff line number Diff line Loading @@ -37,10 +37,7 @@ #include "platsmp.h" static struct of_dev_auxdata apq8084_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("qcom,sdhci-msm", 0xF9824900, "msm_sdcc.1", NULL), OF_DEV_AUXDATA("qcom,sdhci-msm", 0xF98A4900, "msm_sdcc.2", NULL), OF_DEV_AUXDATA("qca,qca1530", 0x00000000, "qca1530.1", NULL), OF_DEV_AUXDATA("qcom,ufshc", 0xFC594000, "msm_ufs.1", NULL), OF_DEV_AUXDATA("qcom,xhci-msm-hsic", 0xf9c00000, "msm_hsic_host", NULL), OF_DEV_AUXDATA("qcom,msm_pcie", 0xFC520000, "msm_pcie.1", NULL), OF_DEV_AUXDATA("qcom,msm_pcie", 0xFC528000, "msm_pcie.2", NULL), Loading arch/arm/mach-msm/clock-8084.c +19 −19 Original line number Diff line number Diff line Loading @@ -5759,10 +5759,10 @@ static struct measure_clk measure_clk = { static struct clk_lookup apq_clocks_8084_rumi[] = { CLK_DUMMY("core_clk", BLSP1_UART_CLK, "f991f000.serial", OFF), CLK_DUMMY("iface_clk", BLSP1_UART_CLK, "f991f000.serial", OFF), CLK_DUMMY("core_clk", SDC1_CLK, "msm_sdcc.1", OFF), CLK_DUMMY("iface_clk", SDC1_P_CLK, "msm_sdcc.1", OFF), CLK_DUMMY("core_clk", SDC2_CLK, "msm_sdcc.2", OFF), CLK_DUMMY("iface_clk", SDC2_P_CLK, "msm_sdcc.2", OFF), CLK_DUMMY("core_clk", SDC1_CLK, "f9824900.sdhci", OFF), CLK_DUMMY("iface_clk", SDC1_P_CLK, "f9824900.sdhci", OFF), CLK_DUMMY("core_clk", SDC2_CLK, "f98a4900.sdhci", OFF), CLK_DUMMY("iface_clk", SDC2_P_CLK, "f98a4900.sdhci", OFF), CLK_DUMMY("xo", NULL, "f9200000.ssusb", OFF), CLK_DUMMY("core_clk", NULL, "f9200000.ssusb", OFF), CLK_DUMMY("iface_clk", NULL, "f9200000.ssusb", OFF), Loading Loading @@ -6051,12 +6051,12 @@ static struct clk_lookup apq_clocks_8084[] = { CLK_LOOKUP("rxoob_clk", gcc_sata_rx_oob_clk.c, "fc581000.sataphy"), /* SDCC clocks */ CLK_LOOKUP("iface_clk", gcc_sdcc1_ahb_clk.c, "msm_sdcc.1"), CLK_LOOKUP("core_clk", gcc_sdcc1_apps_clk.c, "msm_sdcc.1"), CLK_LOOKUP("cal_clk", gcc_sdcc1_cdccal_ff_clk.c, "msm_sdcc.1"), CLK_LOOKUP("sleep_clk", gcc_sdcc1_cdccal_sleep_clk.c, "msm_sdcc.1"), CLK_LOOKUP("iface_clk", gcc_sdcc2_ahb_clk.c, "msm_sdcc.2"), CLK_LOOKUP("core_clk", gcc_sdcc2_apps_clk.c, "msm_sdcc.2"), CLK_LOOKUP("iface_clk", gcc_sdcc1_ahb_clk.c, "f9824900.sdhci"), CLK_LOOKUP("core_clk", gcc_sdcc1_apps_clk.c, "f9824900.sdhci"), CLK_LOOKUP("cal_clk", gcc_sdcc1_cdccal_ff_clk.c, "f9824900.sdhci"), CLK_LOOKUP("sleep_clk", gcc_sdcc1_cdccal_sleep_clk.c, "f9824900.sdhci"), CLK_LOOKUP("iface_clk", gcc_sdcc2_ahb_clk.c, "f98a4900.sdhci"), CLK_LOOKUP("core_clk", gcc_sdcc2_apps_clk.c, "f98a4900.sdhci"), CLK_LOOKUP("", gcc_sdcc3_ahb_clk.c, ""), CLK_LOOKUP("", gcc_sdcc3_apps_clk.c, ""), CLK_LOOKUP("", gcc_sdcc4_ahb_clk.c, ""), Loading @@ -6072,20 +6072,20 @@ static struct clk_lookup apq_clocks_8084[] = { CLK_LOOKUP("ref_clk", gcc_tsif_ref_clk.c, "f99d8000.msm_tspp"), /* UFS clocks */ CLK_LOOKUP("ref_clk", rf_clk1.c, "msm_ufs.1"), CLK_LOOKUP("bus_clk", gcc_sys_noc_ufs_axi_clk.c, "msm_ufs.1"), CLK_LOOKUP("iface_clk", gcc_ufs_ahb_clk.c, "msm_ufs.1"), CLK_LOOKUP("core_clk", gcc_ufs_axi_clk.c, "msm_ufs.1"), CLK_LOOKUP("core_clk_src", ufs_axi_clk_src.c, "msm_ufs.1"), CLK_LOOKUP("ref_clk", rf_clk1.c, "fc594000.ufshc"), CLK_LOOKUP("bus_clk", gcc_sys_noc_ufs_axi_clk.c, "fc594000.ufshc"), CLK_LOOKUP("iface_clk", gcc_ufs_ahb_clk.c, "fc594000.ufshc"), CLK_LOOKUP("core_clk", gcc_ufs_axi_clk.c, "fc594000.ufshc"), CLK_LOOKUP("core_clk_src", ufs_axi_clk_src.c, "fc594000.ufshc"), CLK_LOOKUP("iface_clk", gcc_sys_noc_ufs_axi_clk.c, "msm_bus_ufs"), CLK_LOOKUP("rx_lane0_sync_clk", gcc_ufs_rx_symbol_0_clk.c, "msm_ufs.1"), "fc594000.ufshc"), CLK_LOOKUP("rx_lane1_sync_clk", gcc_ufs_rx_symbol_1_clk.c, "msm_ufs.1"), "fc594000.ufshc"), CLK_LOOKUP("tx_lane0_sync_clk", gcc_ufs_tx_symbol_0_clk.c, "msm_ufs.1"), "fc594000.ufshc"), CLK_LOOKUP("tx_lane1_sync_clk", gcc_ufs_tx_symbol_1_clk.c, "msm_ufs.1"), "fc594000.ufshc"), /* UFS PHY clocks */ CLK_LOOKUP("ref_clk_src", rf_clk3.c, "fc597000.ufsphy"), CLK_LOOKUP("ref_clk_parent", pcie_1_phy_ldo.c, "fc597000.ufsphy"), Loading Loading
arch/arm/mach-msm/board-8084.c +0 −3 Original line number Diff line number Diff line Loading @@ -37,10 +37,7 @@ #include "platsmp.h" static struct of_dev_auxdata apq8084_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("qcom,sdhci-msm", 0xF9824900, "msm_sdcc.1", NULL), OF_DEV_AUXDATA("qcom,sdhci-msm", 0xF98A4900, "msm_sdcc.2", NULL), OF_DEV_AUXDATA("qca,qca1530", 0x00000000, "qca1530.1", NULL), OF_DEV_AUXDATA("qcom,ufshc", 0xFC594000, "msm_ufs.1", NULL), OF_DEV_AUXDATA("qcom,xhci-msm-hsic", 0xf9c00000, "msm_hsic_host", NULL), OF_DEV_AUXDATA("qcom,msm_pcie", 0xFC520000, "msm_pcie.1", NULL), OF_DEV_AUXDATA("qcom,msm_pcie", 0xFC528000, "msm_pcie.2", NULL), Loading
arch/arm/mach-msm/clock-8084.c +19 −19 Original line number Diff line number Diff line Loading @@ -5759,10 +5759,10 @@ static struct measure_clk measure_clk = { static struct clk_lookup apq_clocks_8084_rumi[] = { CLK_DUMMY("core_clk", BLSP1_UART_CLK, "f991f000.serial", OFF), CLK_DUMMY("iface_clk", BLSP1_UART_CLK, "f991f000.serial", OFF), CLK_DUMMY("core_clk", SDC1_CLK, "msm_sdcc.1", OFF), CLK_DUMMY("iface_clk", SDC1_P_CLK, "msm_sdcc.1", OFF), CLK_DUMMY("core_clk", SDC2_CLK, "msm_sdcc.2", OFF), CLK_DUMMY("iface_clk", SDC2_P_CLK, "msm_sdcc.2", OFF), CLK_DUMMY("core_clk", SDC1_CLK, "f9824900.sdhci", OFF), CLK_DUMMY("iface_clk", SDC1_P_CLK, "f9824900.sdhci", OFF), CLK_DUMMY("core_clk", SDC2_CLK, "f98a4900.sdhci", OFF), CLK_DUMMY("iface_clk", SDC2_P_CLK, "f98a4900.sdhci", OFF), CLK_DUMMY("xo", NULL, "f9200000.ssusb", OFF), CLK_DUMMY("core_clk", NULL, "f9200000.ssusb", OFF), CLK_DUMMY("iface_clk", NULL, "f9200000.ssusb", OFF), Loading Loading @@ -6051,12 +6051,12 @@ static struct clk_lookup apq_clocks_8084[] = { CLK_LOOKUP("rxoob_clk", gcc_sata_rx_oob_clk.c, "fc581000.sataphy"), /* SDCC clocks */ CLK_LOOKUP("iface_clk", gcc_sdcc1_ahb_clk.c, "msm_sdcc.1"), CLK_LOOKUP("core_clk", gcc_sdcc1_apps_clk.c, "msm_sdcc.1"), CLK_LOOKUP("cal_clk", gcc_sdcc1_cdccal_ff_clk.c, "msm_sdcc.1"), CLK_LOOKUP("sleep_clk", gcc_sdcc1_cdccal_sleep_clk.c, "msm_sdcc.1"), CLK_LOOKUP("iface_clk", gcc_sdcc2_ahb_clk.c, "msm_sdcc.2"), CLK_LOOKUP("core_clk", gcc_sdcc2_apps_clk.c, "msm_sdcc.2"), CLK_LOOKUP("iface_clk", gcc_sdcc1_ahb_clk.c, "f9824900.sdhci"), CLK_LOOKUP("core_clk", gcc_sdcc1_apps_clk.c, "f9824900.sdhci"), CLK_LOOKUP("cal_clk", gcc_sdcc1_cdccal_ff_clk.c, "f9824900.sdhci"), CLK_LOOKUP("sleep_clk", gcc_sdcc1_cdccal_sleep_clk.c, "f9824900.sdhci"), CLK_LOOKUP("iface_clk", gcc_sdcc2_ahb_clk.c, "f98a4900.sdhci"), CLK_LOOKUP("core_clk", gcc_sdcc2_apps_clk.c, "f98a4900.sdhci"), CLK_LOOKUP("", gcc_sdcc3_ahb_clk.c, ""), CLK_LOOKUP("", gcc_sdcc3_apps_clk.c, ""), CLK_LOOKUP("", gcc_sdcc4_ahb_clk.c, ""), Loading @@ -6072,20 +6072,20 @@ static struct clk_lookup apq_clocks_8084[] = { CLK_LOOKUP("ref_clk", gcc_tsif_ref_clk.c, "f99d8000.msm_tspp"), /* UFS clocks */ CLK_LOOKUP("ref_clk", rf_clk1.c, "msm_ufs.1"), CLK_LOOKUP("bus_clk", gcc_sys_noc_ufs_axi_clk.c, "msm_ufs.1"), CLK_LOOKUP("iface_clk", gcc_ufs_ahb_clk.c, "msm_ufs.1"), CLK_LOOKUP("core_clk", gcc_ufs_axi_clk.c, "msm_ufs.1"), CLK_LOOKUP("core_clk_src", ufs_axi_clk_src.c, "msm_ufs.1"), CLK_LOOKUP("ref_clk", rf_clk1.c, "fc594000.ufshc"), CLK_LOOKUP("bus_clk", gcc_sys_noc_ufs_axi_clk.c, "fc594000.ufshc"), CLK_LOOKUP("iface_clk", gcc_ufs_ahb_clk.c, "fc594000.ufshc"), CLK_LOOKUP("core_clk", gcc_ufs_axi_clk.c, "fc594000.ufshc"), CLK_LOOKUP("core_clk_src", ufs_axi_clk_src.c, "fc594000.ufshc"), CLK_LOOKUP("iface_clk", gcc_sys_noc_ufs_axi_clk.c, "msm_bus_ufs"), CLK_LOOKUP("rx_lane0_sync_clk", gcc_ufs_rx_symbol_0_clk.c, "msm_ufs.1"), "fc594000.ufshc"), CLK_LOOKUP("rx_lane1_sync_clk", gcc_ufs_rx_symbol_1_clk.c, "msm_ufs.1"), "fc594000.ufshc"), CLK_LOOKUP("tx_lane0_sync_clk", gcc_ufs_tx_symbol_0_clk.c, "msm_ufs.1"), "fc594000.ufshc"), CLK_LOOKUP("tx_lane1_sync_clk", gcc_ufs_tx_symbol_1_clk.c, "msm_ufs.1"), "fc594000.ufshc"), /* UFS PHY clocks */ CLK_LOOKUP("ref_clk_src", rf_clk3.c, "fc597000.ufsphy"), CLK_LOOKUP("ref_clk_parent", pcie_1_phy_ldo.c, "fc597000.ufsphy"), Loading