Loading arch/powerpc/boot/cuboot-52xx.c +4 −0 Original line number Diff line number Diff line Loading @@ -37,6 +37,10 @@ static void platform_fixups(void) * this can do a simple path lookup. */ soc = find_node_by_devtype(NULL, "soc"); if (!soc) soc = find_node_by_compatible(NULL, "fsl,mpc5200-immr"); if (!soc) soc = find_node_by_compatible(NULL, "fsl,mpc5200b-immr"); if (soc) { setprop(soc, "bus-frequency", &bd.bi_ipbfreq, sizeof(bd.bi_ipbfreq)); Loading arch/powerpc/platforms/52xx/mpc52xx_common.c +5 −2 Original line number Diff line number Diff line Loading @@ -99,10 +99,13 @@ mpc5200_setup_xlb_arbiter(void) out_be32(&xlb->master_pri_enable, 0xff); out_be32(&xlb->master_priority, 0x11111111); /* Disable XLB pipelining /* * Disable XLB pipelining * (cfr errate 292. We could do this only just before ATA PIO * transaction and re-enable it afterwards ...) * Not needed on MPC5200B. */ if ((mfspr(SPRN_SVR) & MPC5200_SVR_MASK) == MPC5200_SVR) out_be32(&xlb->config, in_be32(&xlb->config) | MPC52xx_XLB_CFG_PLDIS); iounmap(xlb); Loading drivers/net/fec_mpc52xx_phy.c +22 −33 Original line number Diff line number Diff line Loading @@ -2,6 +2,7 @@ * Driver for the MPC5200 Fast Ethernet Controller - MDIO bus driver * * Copyright (C) 2007 Domen Puncer, Telargo, Inc. * Copyright (C) 2008 Wolfram Sang, Pengutronix * * This file is licensed under the terms of the GNU General Public License * version 2. This program is licensed "as is" without any warranty of any Loading @@ -21,58 +22,45 @@ struct mpc52xx_fec_mdio_priv { struct mpc52xx_fec __iomem *regs; }; static int mpc52xx_fec_mdio_read(struct mii_bus *bus, int phy_id, int reg) static int mpc52xx_fec_mdio_transfer(struct mii_bus *bus, int phy_id, int reg, u32 value) { struct mpc52xx_fec_mdio_priv *priv = bus->priv; struct mpc52xx_fec __iomem *fec; int tries = 100; u32 request = FEC_MII_READ_FRAME; value |= (phy_id << FEC_MII_DATA_PA_SHIFT) & FEC_MII_DATA_PA_MSK; value |= (reg << FEC_MII_DATA_RA_SHIFT) & FEC_MII_DATA_RA_MSK; fec = priv->regs; out_be32(&fec->ievent, FEC_IEVENT_MII); request |= (phy_id << FEC_MII_DATA_PA_SHIFT) & FEC_MII_DATA_PA_MSK; request |= (reg << FEC_MII_DATA_RA_SHIFT) & FEC_MII_DATA_RA_MSK; out_be32(&priv->regs->mii_data, request); out_be32(&priv->regs->mii_data, value); /* wait for it to finish, this takes about 23 us on lite5200b */ while (!(in_be32(&fec->ievent) & FEC_IEVENT_MII) && --tries) udelay(5); if (tries == 0) if (!tries) return -ETIMEDOUT; return in_be32(&priv->regs->mii_data) & FEC_MII_DATA_DATAMSK; return value & FEC_MII_DATA_OP_RD ? in_be32(&priv->regs->mii_data) & FEC_MII_DATA_DATAMSK : 0; } static int mpc52xx_fec_mdio_write(struct mii_bus *bus, int phy_id, int reg, u16 data) static int mpc52xx_fec_mdio_read(struct mii_bus *bus, int phy_id, int reg) { struct mpc52xx_fec_mdio_priv *priv = bus->priv; struct mpc52xx_fec __iomem *fec; u32 value = data; int tries = 100; fec = priv->regs; out_be32(&fec->ievent, FEC_IEVENT_MII); value |= FEC_MII_WRITE_FRAME; value |= (phy_id << FEC_MII_DATA_PA_SHIFT) & FEC_MII_DATA_PA_MSK; value |= (reg << FEC_MII_DATA_RA_SHIFT) & FEC_MII_DATA_RA_MSK; out_be32(&priv->regs->mii_data, value); /* wait for request to finish */ while (!(in_be32(&fec->ievent) & FEC_IEVENT_MII) && --tries) udelay(5); if (tries == 0) return -ETIMEDOUT; return mpc52xx_fec_mdio_transfer(bus, phy_id, reg, FEC_MII_READ_FRAME); } return 0; static int mpc52xx_fec_mdio_write(struct mii_bus *bus, int phy_id, int reg, u16 data) { return mpc52xx_fec_mdio_transfer(bus, phy_id, reg, data | FEC_MII_WRITE_FRAME); } static int mpc52xx_fec_mdio_probe(struct of_device *of, const struct of_device_id *match) static int mpc52xx_fec_mdio_probe(struct of_device *of, const struct of_device_id *match) { struct device *dev = &of->dev; struct device_node *np = of->node; Loading Loading @@ -131,7 +119,8 @@ static int mpc52xx_fec_mdio_probe(struct of_device *of, const struct of_device_i dev_set_drvdata(dev, bus); /* set MII speed */ out_be32(&priv->regs->mii_speed, ((mpc52xx_find_ipb_freq(of->node) >> 20) / 5) << 1); out_be32(&priv->regs->mii_speed, ((mpc52xx_find_ipb_freq(of->node) >> 20) / 5) << 1); /* enable MII interrupt */ out_be32(&priv->regs->imask, in_be32(&priv->regs->imask) | FEC_IMASK_MII); Loading Loading
arch/powerpc/boot/cuboot-52xx.c +4 −0 Original line number Diff line number Diff line Loading @@ -37,6 +37,10 @@ static void platform_fixups(void) * this can do a simple path lookup. */ soc = find_node_by_devtype(NULL, "soc"); if (!soc) soc = find_node_by_compatible(NULL, "fsl,mpc5200-immr"); if (!soc) soc = find_node_by_compatible(NULL, "fsl,mpc5200b-immr"); if (soc) { setprop(soc, "bus-frequency", &bd.bi_ipbfreq, sizeof(bd.bi_ipbfreq)); Loading
arch/powerpc/platforms/52xx/mpc52xx_common.c +5 −2 Original line number Diff line number Diff line Loading @@ -99,10 +99,13 @@ mpc5200_setup_xlb_arbiter(void) out_be32(&xlb->master_pri_enable, 0xff); out_be32(&xlb->master_priority, 0x11111111); /* Disable XLB pipelining /* * Disable XLB pipelining * (cfr errate 292. We could do this only just before ATA PIO * transaction and re-enable it afterwards ...) * Not needed on MPC5200B. */ if ((mfspr(SPRN_SVR) & MPC5200_SVR_MASK) == MPC5200_SVR) out_be32(&xlb->config, in_be32(&xlb->config) | MPC52xx_XLB_CFG_PLDIS); iounmap(xlb); Loading
drivers/net/fec_mpc52xx_phy.c +22 −33 Original line number Diff line number Diff line Loading @@ -2,6 +2,7 @@ * Driver for the MPC5200 Fast Ethernet Controller - MDIO bus driver * * Copyright (C) 2007 Domen Puncer, Telargo, Inc. * Copyright (C) 2008 Wolfram Sang, Pengutronix * * This file is licensed under the terms of the GNU General Public License * version 2. This program is licensed "as is" without any warranty of any Loading @@ -21,58 +22,45 @@ struct mpc52xx_fec_mdio_priv { struct mpc52xx_fec __iomem *regs; }; static int mpc52xx_fec_mdio_read(struct mii_bus *bus, int phy_id, int reg) static int mpc52xx_fec_mdio_transfer(struct mii_bus *bus, int phy_id, int reg, u32 value) { struct mpc52xx_fec_mdio_priv *priv = bus->priv; struct mpc52xx_fec __iomem *fec; int tries = 100; u32 request = FEC_MII_READ_FRAME; value |= (phy_id << FEC_MII_DATA_PA_SHIFT) & FEC_MII_DATA_PA_MSK; value |= (reg << FEC_MII_DATA_RA_SHIFT) & FEC_MII_DATA_RA_MSK; fec = priv->regs; out_be32(&fec->ievent, FEC_IEVENT_MII); request |= (phy_id << FEC_MII_DATA_PA_SHIFT) & FEC_MII_DATA_PA_MSK; request |= (reg << FEC_MII_DATA_RA_SHIFT) & FEC_MII_DATA_RA_MSK; out_be32(&priv->regs->mii_data, request); out_be32(&priv->regs->mii_data, value); /* wait for it to finish, this takes about 23 us on lite5200b */ while (!(in_be32(&fec->ievent) & FEC_IEVENT_MII) && --tries) udelay(5); if (tries == 0) if (!tries) return -ETIMEDOUT; return in_be32(&priv->regs->mii_data) & FEC_MII_DATA_DATAMSK; return value & FEC_MII_DATA_OP_RD ? in_be32(&priv->regs->mii_data) & FEC_MII_DATA_DATAMSK : 0; } static int mpc52xx_fec_mdio_write(struct mii_bus *bus, int phy_id, int reg, u16 data) static int mpc52xx_fec_mdio_read(struct mii_bus *bus, int phy_id, int reg) { struct mpc52xx_fec_mdio_priv *priv = bus->priv; struct mpc52xx_fec __iomem *fec; u32 value = data; int tries = 100; fec = priv->regs; out_be32(&fec->ievent, FEC_IEVENT_MII); value |= FEC_MII_WRITE_FRAME; value |= (phy_id << FEC_MII_DATA_PA_SHIFT) & FEC_MII_DATA_PA_MSK; value |= (reg << FEC_MII_DATA_RA_SHIFT) & FEC_MII_DATA_RA_MSK; out_be32(&priv->regs->mii_data, value); /* wait for request to finish */ while (!(in_be32(&fec->ievent) & FEC_IEVENT_MII) && --tries) udelay(5); if (tries == 0) return -ETIMEDOUT; return mpc52xx_fec_mdio_transfer(bus, phy_id, reg, FEC_MII_READ_FRAME); } return 0; static int mpc52xx_fec_mdio_write(struct mii_bus *bus, int phy_id, int reg, u16 data) { return mpc52xx_fec_mdio_transfer(bus, phy_id, reg, data | FEC_MII_WRITE_FRAME); } static int mpc52xx_fec_mdio_probe(struct of_device *of, const struct of_device_id *match) static int mpc52xx_fec_mdio_probe(struct of_device *of, const struct of_device_id *match) { struct device *dev = &of->dev; struct device_node *np = of->node; Loading Loading @@ -131,7 +119,8 @@ static int mpc52xx_fec_mdio_probe(struct of_device *of, const struct of_device_i dev_set_drvdata(dev, bus); /* set MII speed */ out_be32(&priv->regs->mii_speed, ((mpc52xx_find_ipb_freq(of->node) >> 20) / 5) << 1); out_be32(&priv->regs->mii_speed, ((mpc52xx_find_ipb_freq(of->node) >> 20) / 5) << 1); /* enable MII interrupt */ out_be32(&priv->regs->imask, in_be32(&priv->regs->imask) | FEC_IMASK_MII); Loading