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Commit bad1c852 authored by Karthik Parsha's avatar Karthik Parsha
Browse files

ARM: dts: msm: Add SPM PLL management support to MSM8994v2 



8994v2 is able to manage CPU PLL's from SAW when entering L2 and CCI power
collapse. Add additional spm sequence commands for spm pll management. Also
add a property to indicate the same to the driver.

Change-Id: I575a7a2d5a7451663a551d81632152de2cc643aa
Signed-off-by: default avatarKarthik Parsha <kparsha@codeaurora.org>
parent dc2a5c1c

arch/arm/boot/dts/qcom/msm8994-v2-pm.dtsi

+11 −20
Original line number Diff line number Diff line
@@ -30,8 +30,8 @@ 
		qcom,saw2-pmic-data1 = <0x02030080>; /* VDD_APC0 on  */

		qcom,pfm-port = <0x2>;

		qcom,saw2-spm-cmd-wfi = [00 03 00 0f];

		qcom,saw2-spm-cmd-pc = [00 60 70 50 01 03 11 3f 3f 3f 3f 50 00

			60 70 0f];

		qcom,saw2-spm-cmd-pc = [00 60 70 10 20 30 50 01 03 11 3f 3f 3f

			3f 50 20 30 0b 10 00 60 70 0f];

	};



	cluster0_spm: qcom,spm@f9012000 {
@@ -48,9 +48,9 @@ 
		qcom,saw2-spm-cmd-wfi = [03 2f 1b 0f];

		qcom,saw2-spm-cmd-ret = [18 7b 38 48 26 6b 18 03 2f 1b 18 7b

			26 6b 40 40 48 38 18 0f];

		qcom,saw2-spm-cmd-pc = [08 00 30 50 18 7b 48 26 6b 16 6b c0 e2

			d2 5b 18 03 2f 1b 18 7b d2 2b e2 3b c0 16 6b 26 6b 48

			18 00 30 50 08 0f];

		qcom,saw2-spm-cmd-pc = [08 00 60 70 80 30 50 18 7b 48 26 6b 16

			6b c0 e2 d2 5b 18 03 2f 1b 70 80 18 7b d2 2b e2 3b c0

			16 6b 26 6b 48 18 4b 60 00 30 50 08 0f];

	};



	cluster1_spm: qcom,spm@f9013000 {
@@ -74,9 +74,10 @@ 
		qcom,saw2-spm-cmd-wfi = [03 2f 1b 0f];

		qcom,saw2-spm-cmd-ret = [18 7b 48 26 6b 18 03 2f 1b 18 7b 26

			6b 40 40 48 18 0f];

		qcom,saw2-spm-cmd-pc = [08 00 30 50 18 7b 48 26 6b 16 6b c0 e2

			d2 5b 18 b0 01 03 2f 1b 11 b0 3f 3f 3f 3f 18 7b d2 2b

			e2 3b c0 16 6b 26 6b 48 18 00 30 50 08 0f];

		qcom,saw2-spm-cmd-pc = [08 00 60 70 80 30 50 18 7b 48 26 6b 16

			6b c0 e2 d2 5b 18 b0 01 03 2f 1b 11 b0 3f 3f 3f 3f 70

			80 18 7b d2 2b e2 3b c0 16 6b 26 6b 48 18 4b 60 00 30

			50 08 0f];

	};



	qcom,spm@f9089000 {
@@ -589,18 +590,8 @@ 
		#size-cells = <1>;

		ranges;

		reg = <0xfe87f664 0x40>;

		clock-names = "cpu0_clk", "cpu1_clk", "cpu2_clk",

				"cpu3_clk", "cpu4_clk", "cpu5_clk",

				"cpu6_clk", "cpu7_clk", "l2_clk";

		clocks = <&clock_cpu clk_a53_clk>,

			 <&clock_cpu clk_a53_clk>,

			 <&clock_cpu clk_a53_clk>,

			 <&clock_cpu clk_a53_clk>,

			 <&clock_cpu clk_a57_clk>,

			 <&clock_cpu clk_a57_clk>,

			 <&clock_cpu clk_a57_clk>,

			 <&clock_cpu clk_a57_clk>,

			 <&clock_cpu clk_cci_clk>;



		qcom,saw-turns-off-pll;



		qcom,tz-flushes-cache;