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Commit dc2a5c1c authored by Karthik Parsha's avatar Karthik Parsha
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msm: pm: Support SPM PLL management



CPU PLLs can be turned off when the last core running off that PLL enters
power collapse. Skip software clock management in the driver if
qcom,saw-turns-off-pll is set.

Change-Id: I77c52481c9ec4834ac6b7c0355e41069e2e354d6
Signed-off-by: default avatarKarthik Parsha <kparsha@codeaurora.org>
parent 435438a0
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+12 −4
Original line number Diff line number Diff line
@@ -17,20 +17,28 @@ The optional properties are:

- reg: physical IMEM address reserved for PC counters and the size
- qcom,use-sync-timer: Indicates whether the target uses the synchronized QTimer.
- qcom,saw-turns-off-pll: Version of SAW2.1 or can turn off the HFPLL, when
	doing power collapse and so the core need to switch to Global PLL before
	PC.
- qcom,synced-clocks: Indicates that all cpus running off a single clock source and to
	instantiate the necessary clock source.
- qcom,pc-resets-timer: Indicates that the timer gets reset during power collapse.
- qcom,tz-flushes-cache: Indicates that TZ flushes all of the cache during
power collapse. MSM PM can decide to not perform cache flush operations to
reduce latency associated with L2 PC.
- qcom,saw-turns-off-pll: Indicates that the CPU's PLL can be managed from SAW
	hardware. On such targets software mangement of PLL is not required. If
	this property is specified then qcom,synced-clocks would be ignored.

Example:
Example 1:

qcom,pm@fe800664 {
		compatible = "qcom,pm";
		reg = <0xfe800664 0x40>;
		qcom,use-sync-timer;
	};

Example 2:

qcom,pm@fe800664 {
		compatible = "qcom,pm";
		reg = <0xfe800664 0x40>;
		qcom,saw-turns-off-pll;
	};
+4 −0
Original line number Diff line number Diff line
@@ -783,6 +783,10 @@ static int msm_pm_clk_init(struct platform_device *pdev)
	char clk_name[] = "cpu??_clk";
	char *key;

	key = "qcom,saw-turns-off-pll";
	if (of_property_read_bool(pdev->dev.of_node, key))
		return 0;

	key = "qcom,synced-clocks";
	synced_clocks = of_property_read_bool(pdev->dev.of_node, key);