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Commit b5a3b351 authored by Xiaogang Cui's avatar Xiaogang Cui Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: add dt support for etm save and restore for 8936



Add device tree entries for ETM save/restore across power collapse
using memory mapped access.

Change-Id: I067878d4ec6612661317b182e9206ef1a8d18f3b
Signed-off-by: default avatarXiaogang Cui <xiaogang@codeaurora.org>
parent 124e13db
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+58 −0
Original line number Diff line number Diff line
@@ -217,4 +217,62 @@
		qcom,synchronous-cluster-id = <0>;
		qcom,synchronous-cluster-map = <0 0x0F>;
	};

	jtag_fuse: jtagfuse@5e01c {
		compatible = "qcom,jtag-fuse";
		reg = <0x5e01c 0x8>;
		reg-names = "fuse-base";
	};

	jtag_mm0: jtagmm@8fc000 {
		compatible = "qcom,jtagv8-mm";
		reg = <0x8fc000 0x1000>,
		      <0x8f0000 0x1000>;
		reg-names = "etm-base", "debug-base";

		clocks = <&clock_rpm clk_qdss_clk>,
		         <&clock_rpm clk_qdss_a_clk>;
		clock-names = "core_clk", "core_a_clk";

		qcom,coresight-jtagmm-cpu = <&CPU0>;
	};

	jtag_mm1: jtagmm@8fd000 {
		compatible = "qcom,jtagv8-mm";
		reg = <0x8fd000 0x1000>,
		      <0x8f2000 0x1000>;
		reg-names = "etm-base", "debug-base";

		clocks = <&clock_rpm clk_qdss_clk>,
		         <&clock_rpm clk_qdss_a_clk>;
		clock-names = "core_clk", "core_a_clk";

		qcom,coresight-jtagmm-cpu = <&CPU1>;
	};

	jtag_mm2: jtagmm@8fe000 {
		compatible = "qcom,jtagv8-mm";
		reg = <0x8fe000 0x1000>,
		      <0x8f4000 0x1000>;
		reg-names = "etm-base", "debug-base";

		clocks = <&clock_rpm clk_qdss_clk>,
		         <&clock_rpm clk_qdss_a_clk>;
		clock-names = "core_clk", "core_a_clk";

		qcom,coresight-jtagmm-cpu = <&CPU2>;
	};

	jtag_mm3: jtagmm@8ff000 {
		compatible = "qcom,jtagv8-mm";
		reg = <0x8ff000 0x1000>,
		      <0x8f6000 0x1000>;
		reg-names = "etm-base", "debug-base";

		clocks = <&clock_rpm clk_qdss_clk>,
		         <&clock_rpm clk_qdss_a_clk>;
		clock-names = "core_clk", "core_a_clk";

		qcom,coresight-jtagmm-cpu = <&CPU3>;
	};
};