Loading drivers/media/platform/msm/vidc/hfi_packetization.c +11 −0 Original line number Diff line number Diff line Loading @@ -1781,6 +1781,17 @@ int create_pkt_cmd_session_set_property( sizeof(struct hfi_vpe_color_space_conversion); break; } case HAL_PARAM_VENC_VPX_ERROR_RESILIENCE_MODE: { struct hfi_enable *hfi; struct hal_enable *err_res = pdata; pkt->rg_property_data[0] = HFI_PROPERTY_PARAM_VENC_VPX_ERROR_RESILIENCE_MODE; hfi = (struct hfi_enable *)&pkt->rg_property_data[1]; hfi->enable = err_res->enable; pkt->size += sizeof(u32) + sizeof(struct hfi_enable); break; } /* FOLLOWING PROPERTIES ARE NOT IMPLEMENTED IN CORE YET */ case HAL_CONFIG_BUFFER_REQUIREMENTS: case HAL_CONFIG_PRIORITY: Loading drivers/media/platform/msm/vidc/msm_venc.c +16 −0 Original line number Diff line number Diff line Loading @@ -839,6 +839,17 @@ static struct msm_vidc_ctrl msm_venc_ctrls[] = { (1 << V4L2_MPEG_VIDC_VIDEO_RATE_CONTROL_TIMESTAMP_MODE_IGNORE)), .qmenu = timestamp_mode, }, { .id = V4L2_CID_MPEG_VIDC_VIDEO_VPX_ERROR_RESILIENCE, .name = "VP8 Error Resilience mode", .type = V4L2_CTRL_TYPE_BOOLEAN, .minimum = V4L2_MPEG_VIDC_VIDEO_VPX_ERROR_RESILIENCE_DISABLED, .maximum = V4L2_MPEG_VIDC_VIDEO_VPX_ERROR_RESILIENCE_ENABLED, .default_value = V4L2_MPEG_VIDC_VIDEO_VPX_ERROR_RESILIENCE_DISABLED, .step = 1, .qmenu = NULL, }, { .id = V4L2_CID_MPEG_VIDC_VIDEO_ENABLE_INITIAL_QP, .name = "Enable setting initial QP", Loading Loading @@ -2400,6 +2411,11 @@ static int try_set_ctrl(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl) V4L2_MPEG_VIDC_VIDEO_RATE_CONTROL_TIMESTAMP_MODE_IGNORE); pdata = &enable; break; case V4L2_CID_MPEG_VIDC_VIDEO_VPX_ERROR_RESILIENCE: property_id = HAL_PARAM_VENC_VPX_ERROR_RESILIENCE_MODE; enable.enable = ctrl->val; pdata = &enable; break; default: dprintk(VIDC_ERR, "Unsupported index: %x\n", ctrl->id); rc = -ENOTSUPP; Loading drivers/media/platform/msm/vidc/vidc_hfi_api.h +1 −0 Original line number Diff line number Diff line Loading @@ -208,6 +208,7 @@ enum hal_property { HAL_PARAM_VENC_ENABLE_INITIAL_QP, HAL_PARAM_VENC_SEARCH_RANGE, HAL_PARAM_VPE_COLOR_SPACE_CONVERSION, HAL_PARAM_VENC_VPX_ERROR_RESILIENCE_MODE, }; enum hal_domain { Loading drivers/media/platform/msm/vidc/vidc_hfi_helper.h +2 −0 Original line number Diff line number Diff line Loading @@ -330,6 +330,8 @@ struct hfi_buffer_info { (HFI_PROPERTY_PARAM_VENC_COMMON_START + 0x027) #define HFI_PROPERTY_PARAM_VENC_INITIAL_QP \ (HFI_PROPERTY_PARAM_VENC_COMMON_START + 0x028) #define HFI_PROPERTY_PARAM_VENC_VPX_ERROR_RESILIENCE_MODE \ (HFI_PROPERTY_PARAM_VENC_COMMON_START + 0x029) #define HFI_PROPERTY_CONFIG_VENC_COMMON_START \ (HFI_DOMAIN_BASE_VENC + HFI_ARCH_COMMON_OFFSET + 0x6000) Loading include/uapi/linux/v4l2-controls.h +8 −0 Original line number Diff line number Diff line Loading @@ -909,6 +909,14 @@ enum v4l2_mpeg_vidc_video_rate_control_timestamp_mode { #define V4L2_CID_MPEG_VIDC_VIDEO_BFRAME_Y_RANGE \ (V4L2_CID_MPEG_MSM_VIDC_BASE + 62) #define V4L2_CID_MPEG_VIDC_VIDEO_VPX_ERROR_RESILIENCE \ (V4L2_CID_MPEG_MSM_VIDC_BASE + 63) enum vl42_mpeg_vidc_video_vpx_error_resilience { V4L2_MPEG_VIDC_VIDEO_VPX_ERROR_RESILIENCE_DISABLED = 0, V4L2_MPEG_VIDC_VIDEO_VPX_ERROR_RESILIENCE_ENABLED = 1, }; /* Camera class control IDs */ #define V4L2_CID_CAMERA_CLASS_BASE (V4L2_CTRL_CLASS_CAMERA | 0x900) Loading Loading
drivers/media/platform/msm/vidc/hfi_packetization.c +11 −0 Original line number Diff line number Diff line Loading @@ -1781,6 +1781,17 @@ int create_pkt_cmd_session_set_property( sizeof(struct hfi_vpe_color_space_conversion); break; } case HAL_PARAM_VENC_VPX_ERROR_RESILIENCE_MODE: { struct hfi_enable *hfi; struct hal_enable *err_res = pdata; pkt->rg_property_data[0] = HFI_PROPERTY_PARAM_VENC_VPX_ERROR_RESILIENCE_MODE; hfi = (struct hfi_enable *)&pkt->rg_property_data[1]; hfi->enable = err_res->enable; pkt->size += sizeof(u32) + sizeof(struct hfi_enable); break; } /* FOLLOWING PROPERTIES ARE NOT IMPLEMENTED IN CORE YET */ case HAL_CONFIG_BUFFER_REQUIREMENTS: case HAL_CONFIG_PRIORITY: Loading
drivers/media/platform/msm/vidc/msm_venc.c +16 −0 Original line number Diff line number Diff line Loading @@ -839,6 +839,17 @@ static struct msm_vidc_ctrl msm_venc_ctrls[] = { (1 << V4L2_MPEG_VIDC_VIDEO_RATE_CONTROL_TIMESTAMP_MODE_IGNORE)), .qmenu = timestamp_mode, }, { .id = V4L2_CID_MPEG_VIDC_VIDEO_VPX_ERROR_RESILIENCE, .name = "VP8 Error Resilience mode", .type = V4L2_CTRL_TYPE_BOOLEAN, .minimum = V4L2_MPEG_VIDC_VIDEO_VPX_ERROR_RESILIENCE_DISABLED, .maximum = V4L2_MPEG_VIDC_VIDEO_VPX_ERROR_RESILIENCE_ENABLED, .default_value = V4L2_MPEG_VIDC_VIDEO_VPX_ERROR_RESILIENCE_DISABLED, .step = 1, .qmenu = NULL, }, { .id = V4L2_CID_MPEG_VIDC_VIDEO_ENABLE_INITIAL_QP, .name = "Enable setting initial QP", Loading Loading @@ -2400,6 +2411,11 @@ static int try_set_ctrl(struct msm_vidc_inst *inst, struct v4l2_ctrl *ctrl) V4L2_MPEG_VIDC_VIDEO_RATE_CONTROL_TIMESTAMP_MODE_IGNORE); pdata = &enable; break; case V4L2_CID_MPEG_VIDC_VIDEO_VPX_ERROR_RESILIENCE: property_id = HAL_PARAM_VENC_VPX_ERROR_RESILIENCE_MODE; enable.enable = ctrl->val; pdata = &enable; break; default: dprintk(VIDC_ERR, "Unsupported index: %x\n", ctrl->id); rc = -ENOTSUPP; Loading
drivers/media/platform/msm/vidc/vidc_hfi_api.h +1 −0 Original line number Diff line number Diff line Loading @@ -208,6 +208,7 @@ enum hal_property { HAL_PARAM_VENC_ENABLE_INITIAL_QP, HAL_PARAM_VENC_SEARCH_RANGE, HAL_PARAM_VPE_COLOR_SPACE_CONVERSION, HAL_PARAM_VENC_VPX_ERROR_RESILIENCE_MODE, }; enum hal_domain { Loading
drivers/media/platform/msm/vidc/vidc_hfi_helper.h +2 −0 Original line number Diff line number Diff line Loading @@ -330,6 +330,8 @@ struct hfi_buffer_info { (HFI_PROPERTY_PARAM_VENC_COMMON_START + 0x027) #define HFI_PROPERTY_PARAM_VENC_INITIAL_QP \ (HFI_PROPERTY_PARAM_VENC_COMMON_START + 0x028) #define HFI_PROPERTY_PARAM_VENC_VPX_ERROR_RESILIENCE_MODE \ (HFI_PROPERTY_PARAM_VENC_COMMON_START + 0x029) #define HFI_PROPERTY_CONFIG_VENC_COMMON_START \ (HFI_DOMAIN_BASE_VENC + HFI_ARCH_COMMON_OFFSET + 0x6000) Loading
include/uapi/linux/v4l2-controls.h +8 −0 Original line number Diff line number Diff line Loading @@ -909,6 +909,14 @@ enum v4l2_mpeg_vidc_video_rate_control_timestamp_mode { #define V4L2_CID_MPEG_VIDC_VIDEO_BFRAME_Y_RANGE \ (V4L2_CID_MPEG_MSM_VIDC_BASE + 62) #define V4L2_CID_MPEG_VIDC_VIDEO_VPX_ERROR_RESILIENCE \ (V4L2_CID_MPEG_MSM_VIDC_BASE + 63) enum vl42_mpeg_vidc_video_vpx_error_resilience { V4L2_MPEG_VIDC_VIDEO_VPX_ERROR_RESILIENCE_DISABLED = 0, V4L2_MPEG_VIDC_VIDEO_VPX_ERROR_RESILIENCE_ENABLED = 1, }; /* Camera class control IDs */ #define V4L2_CID_CAMERA_CLASS_BASE (V4L2_CTRL_CLASS_CAMERA | 0x900) Loading