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Commit 9e0754c1 authored by Pushkar Joshi's avatar Pushkar Joshi Committed by Aparna Das
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ARM: dts: msm: add coresight byte counter interrupt for 8084 



The CoreSight block can produce an interrupt on transfer of
programmed number of bytes to ETR-memory. Add device tree
entry to support this feature.

Change-Id: I8be2850ef8343bc24446140e26b07bc6bb48b1cb
Signed-off-by: default avatarPushkar Joshi <pushkarj@codeaurora.org>
parent 9ccf1dee
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