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Commit 9d052cab authored by Tarun Karra's avatar Tarun Karra Committed by Jordan Crouse
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msm: kgsl: Add TSE performance counter to software hang detection 



Our current hang detection logic covers rendering pass by checking for
shader performance counters but it does not cover the case where there
is long binning or resolve pass. For long binning pass shader is inactive
making our current hang detection logic faulty. Checking for TSE number of
input primitives covers binning and resolve passes and makes our hang
detection logic robust.

CRs-fixed: 521284
Change-Id: Ifdec4b53685903456feb367f64380119b1485408
Signed-off-by: default avatarTarun Karra <tkarra@codeaurora.org>
parent 001053d2

drivers/gpu/msm/a3xx_reg.h

+3 −0
Original line number Diff line number Diff line
@@ -831,6 +831,9 @@ 
#define SP0_ICL1_MISSES                0x1A

#define SP_FS_CFLOW_INSTRUCTIONS       0x0C



/* COUNTABLE FOR TSE PERFCOUNTER */

#define TSE_INPUT_PRIM_NUM             0x0



/* VBIF PERFCOUNTER ENA/CLR values */

#define VBIF_PERF_CNT_0 BIT(0)

#define VBIF_PERF_CNT_1 BIT(1)

drivers/gpu/msm/adreno.h

+1 −1
Original line number Diff line number Diff line
@@ -470,7 +470,7 @@ struct adreno_gpudev { 
	void (*postmortem_dump)(struct adreno_device *adreno_dev);

};



#define FT_DETECT_REGS_COUNT 12

#define FT_DETECT_REGS_COUNT 14



struct log_field {

	bool show;

drivers/gpu/msm/adreno_a3xx.c

+7 −1
Original line number Diff line number Diff line
@@ -4253,7 +4253,9 @@ int a3xx_perfcounter_init(struct adreno_device *adreno_dev) 
	 * USP L1 instruction miss request.

	 * Set SP to count SP_FS_FULL_ALU_INSTRUCTIONS, it

	 * counts USP flow control instruction execution.

	 * we will use this to augment our hang detection

	 * Set TSE to count TSE_INPUT_PRIM_NUM, it counts

	 * number of input primitives in TSE.

	 * we will use above countables for our hang detection

	 */

	if (adreno_dev->fast_hang_detect) {

		ret = adreno_perfcounter_get(adreno_dev,
@@ -4277,6 +4279,10 @@ int a3xx_perfcounter_init(struct adreno_device *adreno_dev) 
		if (ret)

			goto err;

		ft_detect_regs[11] = ft_detect_regs[10] + 1;

		adreno_perfcounter_get(adreno_dev, KGSL_PERFCOUNTER_GROUP_TSE,

			TSE_INPUT_PRIM_NUM, &ft_detect_regs[12],

			PERFCOUNTER_FLAG_KERNEL);

		ft_detect_regs[13] = ft_detect_regs[12] + 1;

	}



	ret = adreno_perfcounter_get(adreno_dev, KGSL_PERFCOUNTER_GROUP_SP,