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Commit 99fca60c authored by Daniel Vetter's avatar Daniel Vetter
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drm/i915: fixup interlaced vertical timings confusion, part 2



According to bspec, we need to subtract an additional line from vtotal
for interlaced modes and vblank_end needs to equal vtotal. All other
timing fields do not need this special treatment, so kill it.

Bspec says that this is irrespective of whether the interlaced mode
has an odd or even vtotal, both modes are supported.

Reviewed-by: default avatarEugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Tested-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Tested-by: default avatarChristopher Egert <cme3000@gmail.com>
Tested-by: default avatarAlfonso Fiore <alfonso.fiore@gmail.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent ca9bfa7e
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