Loading drivers/video/msm/mdss/mdss_dsi_host.c +7 −19 Original line number Diff line number Diff line Loading @@ -1486,7 +1486,6 @@ irqreturn_t mdss_dsi_isr(int irq, void *ptr) u32 isr; struct mdss_dsi_ctrl_pdata *ctrl = (struct mdss_dsi_ctrl_pdata *)ptr; struct mdss_dsi_ctrl_pdata *mctrl = NULL; if (!ctrl->ctrl_base) { pr_err("%s:%d DSI base adr no Initialized", Loading @@ -1497,20 +1496,6 @@ irqreturn_t mdss_dsi_isr(int irq, void *ptr) isr = MIPI_INP(ctrl->ctrl_base + 0x0110);/* DSI_INTR_CTRL */ MIPI_OUTP(ctrl->ctrl_base + 0x0110, isr); if (mdss_dsi_is_slave_ctrl(ctrl)) { mctrl = mdss_dsi_get_master_ctrl(); if (mctrl) { u32 isr0; isr0 = MIPI_INP(mctrl->ctrl_base + 0x0110); if (isr0 & DSI_INTR_CMD_DMA_DONE) MIPI_OUTP(mctrl->ctrl_base + 0x0110, DSI_INTR_CMD_DMA_DONE); } else { pr_warn("%s: Unable to get master control\n", __func__); } } pr_debug("%s: ndx=%d isr=%x\n", __func__, ctrl->ndx, isr); if (isr & DSI_INTR_ERROR) { Loading @@ -1528,11 +1513,14 @@ irqreturn_t mdss_dsi_isr(int irq, void *ptr) if (isr & DSI_INTR_CMD_DMA_DONE) { MDSS_XLOG(ctrl->ndx, ctrl->mdp_busy, isr, 0x98); /* at broadcast mode, only slave's irq enabled */ if (!mdss_dsi_is_master_ctrl(ctrl)) { spin_lock(&ctrl->mdp_lock); mdss_dsi_disable_irq_nosync(ctrl, DSI_CMD_TERM); complete(&ctrl->dma_comp); spin_unlock(&ctrl->mdp_lock); } } if (isr & DSI_INTR_CMD_MDP_DONE) { MDSS_XLOG(ctrl->ndx, ctrl->mdp_busy, isr, 0x99); Loading Loading
drivers/video/msm/mdss/mdss_dsi_host.c +7 −19 Original line number Diff line number Diff line Loading @@ -1486,7 +1486,6 @@ irqreturn_t mdss_dsi_isr(int irq, void *ptr) u32 isr; struct mdss_dsi_ctrl_pdata *ctrl = (struct mdss_dsi_ctrl_pdata *)ptr; struct mdss_dsi_ctrl_pdata *mctrl = NULL; if (!ctrl->ctrl_base) { pr_err("%s:%d DSI base adr no Initialized", Loading @@ -1497,20 +1496,6 @@ irqreturn_t mdss_dsi_isr(int irq, void *ptr) isr = MIPI_INP(ctrl->ctrl_base + 0x0110);/* DSI_INTR_CTRL */ MIPI_OUTP(ctrl->ctrl_base + 0x0110, isr); if (mdss_dsi_is_slave_ctrl(ctrl)) { mctrl = mdss_dsi_get_master_ctrl(); if (mctrl) { u32 isr0; isr0 = MIPI_INP(mctrl->ctrl_base + 0x0110); if (isr0 & DSI_INTR_CMD_DMA_DONE) MIPI_OUTP(mctrl->ctrl_base + 0x0110, DSI_INTR_CMD_DMA_DONE); } else { pr_warn("%s: Unable to get master control\n", __func__); } } pr_debug("%s: ndx=%d isr=%x\n", __func__, ctrl->ndx, isr); if (isr & DSI_INTR_ERROR) { Loading @@ -1528,11 +1513,14 @@ irqreturn_t mdss_dsi_isr(int irq, void *ptr) if (isr & DSI_INTR_CMD_DMA_DONE) { MDSS_XLOG(ctrl->ndx, ctrl->mdp_busy, isr, 0x98); /* at broadcast mode, only slave's irq enabled */ if (!mdss_dsi_is_master_ctrl(ctrl)) { spin_lock(&ctrl->mdp_lock); mdss_dsi_disable_irq_nosync(ctrl, DSI_CMD_TERM); complete(&ctrl->dma_comp); spin_unlock(&ctrl->mdp_lock); } } if (isr & DSI_INTR_CMD_MDP_DONE) { MDSS_XLOG(ctrl->ndx, ctrl->mdp_busy, isr, 0x99); Loading